From patchwork Mon Mar 7 15:00:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 51723 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A344A385801C for ; Mon, 7 Mar 2022 16:21:51 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A344A385801C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1646670111; bh=n/ORd9ZDfssYHjBRzWCKKVVPdwONBIRpdENTEZ/nL34=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=F0JhulcB79IH3Nzq79jrTL+rNdV8y1IbnOMwstM+jIsisgW9RK3evldQn1x/8mYfI 3TAr31/07HNMcKswX0sQP/02ZEUkU9+3SjlYScCuYY0de+Crv8qrH74CxgTap05hTA 1kSP8Sb6vCjrkcb050tKrDKTvI71kbXqYxvdCfQs= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by sourceware.org (Postfix) with ESMTPS id F06AB3858004 for ; Mon, 7 Mar 2022 15:03:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F06AB3858004 X-IronPort-AV: E=McAfee;i="6200,9189,10278"; a="234364128" X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="234364128" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2022 07:02:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="687561718" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga001.fm.intel.com with ESMTP; 07 Mar 2022 07:02:06 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 227F21eO016772; Mon, 7 Mar 2022 07:02:06 -0800 To: libc-alpha@sourceware.org Subject: [PATCH 050/126] x86_64: Fix svml_s_coshf4_core_sse4.S code formatting Date: Mon, 7 Mar 2022 07:00:45 -0800 Message-Id: <20220307150201.10590-51-skpgkp2@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220307150201.10590-1-skpgkp2@gmail.com> References: <20220307150201.10590-1-skpgkp2@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, SCC_5_SHORT_WORD_LINES, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. --- .../fpu/multiarch/svml_s_coshf4_core_sse4.S | 484 +++++++++--------- 1 file changed, 241 insertions(+), 243 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_coshf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_coshf4_core_sse4.S index 7812fe9345..5d0d3db893 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_coshf4_core_sse4.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_coshf4_core_sse4.S @@ -34,272 +34,270 @@ /* Offsets for data table __svml_scosh_data_internal */ -#define _sInvLn2 0 -#define _sLn2hi 16 -#define _sLn2lo 32 -#define _sSign 48 -#define _sShifter 64 -#define _iDomainRange 80 -#define _sPC1 96 -#define _sPC2 112 -#define _sPC3 128 -#define _sPC4 144 -#define _sPC5 160 -#define _sPC6 176 -#define _iHalf 192 +#define _sInvLn2 0 +#define _sLn2hi 16 +#define _sLn2lo 32 +#define _sSign 48 +#define _sShifter 64 +#define _iDomainRange 80 +#define _sPC1 96 +#define _sPC2 112 +#define _sPC3 128 +#define _sPC4 144 +#define _sPC5 160 +#define _sPC6 176 +#define _iHalf 192 #include - .text - .section .text.sse4,"ax",@progbits + .section .text.sse4, "ax", @progbits ENTRY(_ZGVbN4v_coshf_sse4) - subq $72, %rsp - cfi_def_cfa_offset(80) - -/* - * Implementation - * Abs argument - */ - movups _sSign+__svml_scosh_data_internal(%rip), %xmm1 - -/* - * Load argument - * dM = x/log(2) + RShifter - */ - movups _sInvLn2+__svml_scosh_data_internal(%rip), %xmm9 - andnps %xmm0, %xmm1 - mulps %xmm1, %xmm9 - -/* Check for overflow\underflow */ - movaps %xmm1, %xmm3 - movups _sShifter+__svml_scosh_data_internal(%rip), %xmm4 - movups _sLn2hi+__svml_scosh_data_internal(%rip), %xmm5 - addps %xmm4, %xmm9 - -/* - * R - * sN = sM - RShifter - */ - movaps %xmm9, %xmm6 - -/* - * G1,G2 2^N,2^(-N) - * iM now is an EXP(2^N) - */ - pslld $23, %xmm9 - movups _sLn2lo+__svml_scosh_data_internal(%rip), %xmm7 - subps %xmm4, %xmm6 - -/* sR = sX - sN*Log2_hi */ - mulps %xmm6, %xmm5 - -/* sR = (sX - sN*Log2_hi) - sN*Log2_lo */ - mulps %xmm6, %xmm7 - movdqu _iDomainRange+__svml_scosh_data_internal(%rip), %xmm2 - pcmpgtd %xmm2, %xmm3 - pcmpeqd %xmm1, %xmm2 - -/* - * sinh(r) = r*((a1=1)+r^2*(a3+r^2*(a5+{v1 r^2*a7})))) = r + r*(r^2*(a3+r^2*(a5+r^2*a7))) .... - * sSinh_r = (a3+r^2*a5) - */ - movups _sPC5+__svml_scosh_data_internal(%rip), %xmm10 - por %xmm2, %xmm3 - -/* - * sinh(X) = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) - * sOut = (a4 +a6*sR2) - */ - movups _sPC6+__svml_scosh_data_internal(%rip), %xmm11 - subps %xmm5, %xmm1 - movmskps %xmm3, %edx - movdqu _iHalf+__svml_scosh_data_internal(%rip), %xmm8 - subps %xmm7, %xmm1 - -/* sR2 = sR^2,shaffled */ - movaps %xmm1, %xmm13 - movdqa %xmm8, %xmm2 - mulps %xmm1, %xmm13 - paddd %xmm9, %xmm2 - mulps %xmm13, %xmm10 - psubd %xmm9, %xmm8 - mulps %xmm13, %xmm11 - addps _sPC3+__svml_scosh_data_internal(%rip), %xmm10 - addps _sPC4+__svml_scosh_data_internal(%rip), %xmm11 - -/* sSinh_r = r^2*(a3+r^2*a5) */ - mulps %xmm13, %xmm10 - -/* sOut = a2+sR2*(a4+a6*sR2) */ - mulps %xmm13, %xmm11 - -/* sSinh_r = r + r*(r^2*(a3+r^2*a5)) */ - mulps %xmm1, %xmm10 - addps _sPC2+__svml_scosh_data_internal(%rip), %xmm11 - addps %xmm10, %xmm1 - -/* sOut = sR2*(a2+sR2*(a4+a6*sR2) */ - mulps %xmm11, %xmm13 - -/* sG1 = 2^(N-1)-2^(-N-1) */ - movdqa %xmm2, %xmm12 - -/* sG2 = 2^(N-1)+2^(-N-1) */ - addps %xmm8, %xmm2 - subps %xmm8, %xmm12 - -/* sOut = sG2*sR2*(a2+sR2*(a4+a6*sR2) */ - mulps %xmm2, %xmm13 - -/* sOut = sG1*sinh(dR)+sG2*sR2*(a2+sR2*(a4+a6*sR2) */ - mulps %xmm1, %xmm12 - addps %xmm12, %xmm13 - -/* sOut = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) */ - addps %xmm13, %xmm2 - -/* Ret H */ - testl %edx, %edx - -/* Go to special inputs processing branch */ - jne L(SPECIAL_VALUES_BRANCH) - # LOE rbx rbp r12 r13 r14 r15 edx xmm0 xmm2 - -/* Restore registers - * and exit the function - */ + subq $72, %rsp + cfi_def_cfa_offset(80) + + /* + * Implementation + * Abs argument + */ + movups _sSign+__svml_scosh_data_internal(%rip), %xmm1 + + /* + * Load argument + * dM = x/log(2) + RShifter + */ + movups _sInvLn2+__svml_scosh_data_internal(%rip), %xmm9 + andnps %xmm0, %xmm1 + mulps %xmm1, %xmm9 + + /* Check for overflow\underflow */ + movaps %xmm1, %xmm3 + movups _sShifter+__svml_scosh_data_internal(%rip), %xmm4 + movups _sLn2hi+__svml_scosh_data_internal(%rip), %xmm5 + addps %xmm4, %xmm9 + + /* + * R + * sN = sM - RShifter + */ + movaps %xmm9, %xmm6 + + /* + * G1, G2 2^N, 2^(-N) + * iM now is an EXP(2^N) + */ + pslld $23, %xmm9 + movups _sLn2lo+__svml_scosh_data_internal(%rip), %xmm7 + subps %xmm4, %xmm6 + + /* sR = sX - sN*Log2_hi */ + mulps %xmm6, %xmm5 + + /* sR = (sX - sN*Log2_hi) - sN*Log2_lo */ + mulps %xmm6, %xmm7 + movdqu _iDomainRange+__svml_scosh_data_internal(%rip), %xmm2 + pcmpgtd %xmm2, %xmm3 + pcmpeqd %xmm1, %xmm2 + + /* + * sinh(r) = r*((a1=1)+r^2*(a3+r^2*(a5+{v1 r^2*a7})))) = r + r*(r^2*(a3+r^2*(a5+r^2*a7))) .... + * sSinh_r = (a3+r^2*a5) + */ + movups _sPC5+__svml_scosh_data_internal(%rip), %xmm10 + por %xmm2, %xmm3 + + /* + * sinh(X) = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) + * sOut = (a4 +a6*sR2) + */ + movups _sPC6+__svml_scosh_data_internal(%rip), %xmm11 + subps %xmm5, %xmm1 + movmskps %xmm3, %edx + movdqu _iHalf+__svml_scosh_data_internal(%rip), %xmm8 + subps %xmm7, %xmm1 + + /* sR2 = sR^2, shaffled */ + movaps %xmm1, %xmm13 + movdqa %xmm8, %xmm2 + mulps %xmm1, %xmm13 + paddd %xmm9, %xmm2 + mulps %xmm13, %xmm10 + psubd %xmm9, %xmm8 + mulps %xmm13, %xmm11 + addps _sPC3+__svml_scosh_data_internal(%rip), %xmm10 + addps _sPC4+__svml_scosh_data_internal(%rip), %xmm11 + + /* sSinh_r = r^2*(a3+r^2*a5) */ + mulps %xmm13, %xmm10 + + /* sOut = a2+sR2*(a4+a6*sR2) */ + mulps %xmm13, %xmm11 + + /* sSinh_r = r + r*(r^2*(a3+r^2*a5)) */ + mulps %xmm1, %xmm10 + addps _sPC2+__svml_scosh_data_internal(%rip), %xmm11 + addps %xmm10, %xmm1 + + /* sOut = sR2*(a2+sR2*(a4+a6*sR2) */ + mulps %xmm11, %xmm13 + + /* sG1 = 2^(N-1)-2^(-N-1) */ + movdqa %xmm2, %xmm12 + + /* sG2 = 2^(N-1)+2^(-N-1) */ + addps %xmm8, %xmm2 + subps %xmm8, %xmm12 + + /* sOut = sG2*sR2*(a2+sR2*(a4+a6*sR2) */ + mulps %xmm2, %xmm13 + + /* sOut = sG1*sinh(dR)+sG2*sR2*(a2+sR2*(a4+a6*sR2) */ + mulps %xmm1, %xmm12 + addps %xmm12, %xmm13 + + /* sOut = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) */ + addps %xmm13, %xmm2 + + /* Ret H */ + testl %edx, %edx + + /* Go to special inputs processing branch */ + jne L(SPECIAL_VALUES_BRANCH) + # LOE rbx rbp r12 r13 r14 r15 edx xmm0 xmm2 + + /* Restore registers + * and exit the function + */ L(EXIT): - movaps %xmm2, %xmm0 - addq $72, %rsp - cfi_def_cfa_offset(8) - ret - cfi_def_cfa_offset(80) - -/* Branch to process - * special inputs - */ + movaps %xmm2, %xmm0 + addq $72, %rsp + cfi_def_cfa_offset(8) + ret + cfi_def_cfa_offset(80) + + /* Branch to process + * special inputs + */ L(SPECIAL_VALUES_BRANCH): - movups %xmm0, 32(%rsp) - movups %xmm2, 48(%rsp) - # LOE rbx rbp r12 r13 r14 r15 edx - - xorl %eax, %eax - movq %r12, 16(%rsp) - cfi_offset(12, -64) - movl %eax, %r12d - movq %r13, 8(%rsp) - cfi_offset(13, -72) - movl %edx, %r13d - movq %r14, (%rsp) - cfi_offset(14, -80) - # LOE rbx rbp r15 r12d r13d - -/* Range mask - * bits check - */ + movups %xmm0, 32(%rsp) + movups %xmm2, 48(%rsp) + # LOE rbx rbp r12 r13 r14 r15 edx + + xorl %eax, %eax + movq %r12, 16(%rsp) + cfi_offset(12, -64) + movl %eax, %r12d + movq %r13, 8(%rsp) + cfi_offset(13, -72) + movl %edx, %r13d + movq %r14, (%rsp) + cfi_offset(14, -80) + # LOE rbx rbp r15 r12d r13d + + /* Range mask + * bits check + */ L(RANGEMASK_CHECK): - btl %r12d, %r13d + btl %r12d, %r13d -/* Call scalar math function */ - jc L(SCALAR_MATH_CALL) - # LOE rbx rbp r15 r12d r13d + /* Call scalar math function */ + jc L(SCALAR_MATH_CALL) + # LOE rbx rbp r15 r12d r13d -/* Special inputs - * processing loop - */ + /* Special inputs + * processing loop + */ L(SPECIAL_VALUES_LOOP): - incl %r12d - cmpl $4, %r12d - -/* Check bits in range mask */ - jl L(RANGEMASK_CHECK) - # LOE rbx rbp r15 r12d r13d - - movq 16(%rsp), %r12 - cfi_restore(12) - movq 8(%rsp), %r13 - cfi_restore(13) - movq (%rsp), %r14 - cfi_restore(14) - movups 48(%rsp), %xmm2 - -/* Go to exit */ - jmp L(EXIT) - cfi_offset(12, -64) - cfi_offset(13, -72) - cfi_offset(14, -80) - # LOE rbx rbp r12 r13 r14 r15 xmm2 - -/* Scalar math fucntion call - * to process special input - */ + incl %r12d + cmpl $4, %r12d + + /* Check bits in range mask */ + jl L(RANGEMASK_CHECK) + # LOE rbx rbp r15 r12d r13d + + movq 16(%rsp), %r12 + cfi_restore(12) + movq 8(%rsp), %r13 + cfi_restore(13) + movq (%rsp), %r14 + cfi_restore(14) + movups 48(%rsp), %xmm2 + + /* Go to exit */ + jmp L(EXIT) + cfi_offset(12, -64) + cfi_offset(13, -72) + cfi_offset(14, -80) + # LOE rbx rbp r12 r13 r14 r15 xmm2 + + /* Scalar math fucntion call + * to process special input + */ L(SCALAR_MATH_CALL): - movl %r12d, %r14d - movss 32(%rsp,%r14,4), %xmm0 - call coshf@PLT - # LOE rbx rbp r14 r15 r12d r13d xmm0 + movl %r12d, %r14d + movss 32(%rsp, %r14, 4), %xmm0 + call coshf@PLT + # LOE rbx rbp r14 r15 r12d r13d xmm0 - movss %xmm0, 48(%rsp,%r14,4) + movss %xmm0, 48(%rsp, %r14, 4) -/* Process special inputs in loop */ - jmp L(SPECIAL_VALUES_LOOP) - # LOE rbx rbp r15 r12d r13d + /* Process special inputs in loop */ + jmp L(SPECIAL_VALUES_LOOP) + # LOE rbx rbp r15 r12d r13d END(_ZGVbN4v_coshf_sse4) - .section .rodata, "a" - .align 16 + .section .rodata, "a" + .align 16 #ifdef __svml_scosh_data_internal_typedef typedef unsigned int VUINT32; -typedef struct -{ - __declspec(align(16)) VUINT32 _sInvLn2[4][1]; - __declspec(align(16)) VUINT32 _sLn2hi[4][1]; - __declspec(align(16)) VUINT32 _sLn2lo[4][1]; - __declspec(align(16)) VUINT32 _sSign[4][1]; - __declspec(align(16)) VUINT32 _sShifter[4][1]; - __declspec(align(16)) VUINT32 _iDomainRange[4][1]; - __declspec(align(16)) VUINT32 _sPC1[4][1]; - __declspec(align(16)) VUINT32 _sPC2[4][1]; - __declspec(align(16)) VUINT32 _sPC3[4][1]; - __declspec(align(16)) VUINT32 _sPC4[4][1]; - __declspec(align(16)) VUINT32 _sPC5[4][1]; - __declspec(align(16)) VUINT32 _sPC6[4][1]; - __declspec(align(16)) VUINT32 _iHalf[4][1]; +typedef struct { + __declspec(align(16)) VUINT32 _sInvLn2[4][1]; + __declspec(align(16)) VUINT32 _sLn2hi[4][1]; + __declspec(align(16)) VUINT32 _sLn2lo[4][1]; + __declspec(align(16)) VUINT32 _sSign[4][1]; + __declspec(align(16)) VUINT32 _sShifter[4][1]; + __declspec(align(16)) VUINT32 _iDomainRange[4][1]; + __declspec(align(16)) VUINT32 _sPC1[4][1]; + __declspec(align(16)) VUINT32 _sPC2[4][1]; + __declspec(align(16)) VUINT32 _sPC3[4][1]; + __declspec(align(16)) VUINT32 _sPC4[4][1]; + __declspec(align(16)) VUINT32 _sPC5[4][1]; + __declspec(align(16)) VUINT32 _sPC6[4][1]; + __declspec(align(16)) VUINT32 _iHalf[4][1]; } __svml_scosh_data_internal; #endif __svml_scosh_data_internal: - .long 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B /* _sInvLn2 */ //k=0 - .align 16 - .long 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000 /* _sLn2hi */ - .align 16 - .long 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4 /* _sLn2lo */ - .align 16 - .long 0x80000000, 0x80000000, 0x80000000, 0x80000000 /* _sSign */ - .align 16 - .long 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000 /* _sShifter */ - .align 16 - .long 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E /* _iDomainRange */ - .align 16 - .long 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000 /* _sPC1=1 */ - .align 16 - .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _sPC2 */ - .align 16 - .long 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57 /* _sPC3 */ - .align 16 - .long 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72 /* _sPC4 */ - .align 16 - .long 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461 /* _sPC5 */ - .align 16 - .long 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3 /* _sPC6 */ - // Integer constants - .align 16 - .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _iHalf*/ - .align 16 - .type __svml_scosh_data_internal,@object - .size __svml_scosh_data_internal,.-__svml_scosh_data_internal + .long 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B /* _sInvLn2 */ // k=0 + .align 16 + .long 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000 /* _sLn2hi */ + .align 16 + .long 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4 /* _sLn2lo */ + .align 16 + .long 0x80000000, 0x80000000, 0x80000000, 0x80000000 /* _sSign */ + .align 16 + .long 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000 /* _sShifter */ + .align 16 + .long 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E /* _iDomainRange */ + .align 16 + .long 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000 /* _sPC1=1 */ + .align 16 + .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _sPC2 */ + .align 16 + .long 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57 /* _sPC3 */ + .align 16 + .long 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72 /* _sPC4 */ + .align 16 + .long 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461 /* _sPC5 */ + .align 16 + .long 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3 /* _sPC6 */ + // Integer constants + .align 16 + .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _iHalf */ + .align 16 + .type __svml_scosh_data_internal, @object + .size __svml_scosh_data_internal, .-__svml_scosh_data_internal