From patchwork Mon Mar 7 15:00:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 51622 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7D3B43858434 for ; Mon, 7 Mar 2022 15:03:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7D3B43858434 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1646665439; bh=KINRBi+G9MPdPHHqP95PiNGzsY54NtO2ex7rtOdip8Y=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=UQNa7aJiZz++tCsAOF0XLEoxPG72c6f7wnw8ATRxBWhEPufqHkNdachnlKJtgOpnQ 3L5dD4nWhyQ1u7LW40IqkBSQL3OeFUjLlB+bTBu4zcMFNzeTy7PTlTE6bx7vcKH8t7 geYDj2OWTeFKYcHoboLGooEU+xjWKhN3RLYpl878= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by sourceware.org (Postfix) with ESMTPS id C704E3858403 for ; Mon, 7 Mar 2022 15:02:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C704E3858403 X-IronPort-AV: E=McAfee;i="6200,9189,10278"; a="254347772" X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="254347772" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2022 07:02:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="780351102" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga006.fm.intel.com with ESMTP; 07 Mar 2022 07:02:04 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 227F21e2016772; Mon, 7 Mar 2022 07:02:04 -0800 To: libc-alpha@sourceware.org Subject: [PATCH 028/126] x86_64: Fix svml_d_atan2_core_sse4.S code formatting Date: Mon, 7 Mar 2022 07:00:23 -0800 Message-Id: <20220307150201.10590-29-skpgkp2@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220307150201.10590-1-skpgkp2@gmail.com> References: <20220307150201.10590-1-skpgkp2@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. --- .../fpu/multiarch/svml_d_atan2_core_sse4.S | 395 +++++++++--------- 1 file changed, 197 insertions(+), 198 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_atan2_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_d_atan2_core_sse4.S index 31194c8e4c..055ca4acc8 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_d_atan2_core_sse4.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_atan2_core_sse4.S @@ -30,216 +30,215 @@ /* Offsets for data table __svml_datan_data_internal_avx512 */ -#define AbsMask 0 -#define Shifter 16 -#define MaxThreshold 32 -#define MOne 48 -#define One 64 -#define LargeX 80 -#define Zero 96 -#define Tbl_H 112 -#define Tbl_L 368 -#define dIndexMed 624 -#define Pi2 640 -#define Pi2_low 656 -#define coeff 672 +#define AbsMask 0 +#define Shifter 16 +#define MaxThreshold 32 +#define MOne 48 +#define One 64 +#define LargeX 80 +#define Zero 96 +#define Tbl_H 112 +#define Tbl_L 368 +#define dIndexMed 624 +#define Pi2 640 +#define Pi2_low 656 +#define coeff 672 #include - .text - .section .text.sse4,"ax",@progbits + .section .text.sse4, "ax", @progbits ENTRY(_ZGVbN2v_atan_sse4) - lea Tbl_H+128+__svml_datan_data_internal_avx512(%rip), %rcx - movups __svml_datan_data_internal_avx512(%rip), %xmm4 - movups Shifter+__svml_datan_data_internal_avx512(%rip), %xmm3 - andps %xmm0, %xmm4 - movaps %xmm3, %xmm12 - movaps %xmm4, %xmm5 - addpd %xmm4, %xmm12 - movaps %xmm12, %xmm7 - -/* - * table lookup sequence - * VPERMUTE not available - */ - movaps %xmm12, %xmm10 - subpd %xmm3, %xmm7 - subpd %xmm7, %xmm5 - mulpd %xmm4, %xmm7 - movups MaxThreshold+__svml_datan_data_internal_avx512(%rip), %xmm2 - psllq $3, %xmm10 - -/* saturate X range */ - movups LargeX+__svml_datan_data_internal_avx512(%rip), %xmm8 - pxor %xmm4, %xmm0 - cmplepd %xmm4, %xmm2 - addpd One+__svml_datan_data_internal_avx512(%rip), %xmm7 - minpd %xmm4, %xmm8 - movups MOne+__svml_datan_data_internal_avx512(%rip), %xmm6 - movaps %xmm2, %xmm1 - movaps %xmm2, %xmm9 - andnps %xmm5, %xmm1 - andps %xmm2, %xmm6 - andnps %xmm7, %xmm9 - andps %xmm2, %xmm8 - orps %xmm6, %xmm1 - orps %xmm8, %xmm9 - -/* R+Rl = DiffX/Y */ - divpd %xmm9, %xmm1 - pand .FLT_11(%rip), %xmm10 - -/* set table value to Pi/2 for large X */ - movups Pi2+__svml_datan_data_internal_avx512(%rip), %xmm4 - movd %xmm10, %eax - andps %xmm2, %xmm4 - pshufd $2, %xmm10, %xmm11 - movaps %xmm2, %xmm10 - -/* polynomial evaluation */ - movaps %xmm1, %xmm2 - mulpd %xmm1, %xmm2 - movd %xmm11, %edx - movups coeff+__svml_datan_data_internal_avx512(%rip), %xmm5 - movaps %xmm2, %xmm7 - movups coeff+32+__svml_datan_data_internal_avx512(%rip), %xmm6 - movaps %xmm2, %xmm9 - mulpd %xmm2, %xmm5 - mulpd %xmm2, %xmm7 - addpd coeff+16+__svml_datan_data_internal_avx512(%rip), %xmm5 - mulpd %xmm2, %xmm6 - mulpd %xmm7, %xmm5 - addpd coeff+48+__svml_datan_data_internal_avx512(%rip), %xmm6 - mulpd %xmm1, %xmm9 - addpd %xmm5, %xmm6 - movups coeff+64+__svml_datan_data_internal_avx512(%rip), %xmm8 - mulpd %xmm2, %xmm8 - mulpd %xmm6, %xmm7 - addpd coeff+80+__svml_datan_data_internal_avx512(%rip), %xmm8 - addpd %xmm7, %xmm8 - mulpd %xmm8, %xmm9 - movups dIndexMed+__svml_datan_data_internal_avx512(%rip), %xmm14 - cmplepd %xmm12, %xmm14 - addpd %xmm9, %xmm1 - movslq %eax, %rax - movaps %xmm14, %xmm3 - movslq %edx, %rdx - movsd -128(%rax,%rcx), %xmm13 - movsd (%rcx,%rax), %xmm15 - movhpd -128(%rdx,%rcx), %xmm13 - movhpd (%rcx,%rdx), %xmm15 - andnps %xmm13, %xmm3 - andps %xmm14, %xmm15 - orps %xmm15, %xmm3 - andnps %xmm3, %xmm10 - orps %xmm4, %xmm10 - addpd %xmm1, %xmm10 - pxor %xmm10, %xmm0 - ret + lea Tbl_H+128+__svml_datan_data_internal_avx512(%rip), %rcx + movups __svml_datan_data_internal_avx512(%rip), %xmm4 + movups Shifter+__svml_datan_data_internal_avx512(%rip), %xmm3 + andps %xmm0, %xmm4 + movaps %xmm3, %xmm12 + movaps %xmm4, %xmm5 + addpd %xmm4, %xmm12 + movaps %xmm12, %xmm7 + + /* + * table lookup sequence + * VPERMUTE not available + */ + movaps %xmm12, %xmm10 + subpd %xmm3, %xmm7 + subpd %xmm7, %xmm5 + mulpd %xmm4, %xmm7 + movups MaxThreshold+__svml_datan_data_internal_avx512(%rip), %xmm2 + psllq $3, %xmm10 + + /* saturate X range */ + movups LargeX+__svml_datan_data_internal_avx512(%rip), %xmm8 + pxor %xmm4, %xmm0 + cmplepd %xmm4, %xmm2 + addpd One+__svml_datan_data_internal_avx512(%rip), %xmm7 + minpd %xmm4, %xmm8 + movups MOne+__svml_datan_data_internal_avx512(%rip), %xmm6 + movaps %xmm2, %xmm1 + movaps %xmm2, %xmm9 + andnps %xmm5, %xmm1 + andps %xmm2, %xmm6 + andnps %xmm7, %xmm9 + andps %xmm2, %xmm8 + orps %xmm6, %xmm1 + orps %xmm8, %xmm9 + + /* R+Rl = DiffX/Y */ + divpd %xmm9, %xmm1 + pand .FLT_11(%rip), %xmm10 + + /* set table value to Pi/2 for large X */ + movups Pi2+__svml_datan_data_internal_avx512(%rip), %xmm4 + movd %xmm10, %eax + andps %xmm2, %xmm4 + pshufd $2, %xmm10, %xmm11 + movaps %xmm2, %xmm10 + + /* polynomial evaluation */ + movaps %xmm1, %xmm2 + mulpd %xmm1, %xmm2 + movd %xmm11, %edx + movups coeff+__svml_datan_data_internal_avx512(%rip), %xmm5 + movaps %xmm2, %xmm7 + movups coeff+32+__svml_datan_data_internal_avx512(%rip), %xmm6 + movaps %xmm2, %xmm9 + mulpd %xmm2, %xmm5 + mulpd %xmm2, %xmm7 + addpd coeff+16+__svml_datan_data_internal_avx512(%rip), %xmm5 + mulpd %xmm2, %xmm6 + mulpd %xmm7, %xmm5 + addpd coeff+48+__svml_datan_data_internal_avx512(%rip), %xmm6 + mulpd %xmm1, %xmm9 + addpd %xmm5, %xmm6 + movups coeff+64+__svml_datan_data_internal_avx512(%rip), %xmm8 + mulpd %xmm2, %xmm8 + mulpd %xmm6, %xmm7 + addpd coeff+80+__svml_datan_data_internal_avx512(%rip), %xmm8 + addpd %xmm7, %xmm8 + mulpd %xmm8, %xmm9 + movups dIndexMed+__svml_datan_data_internal_avx512(%rip), %xmm14 + cmplepd %xmm12, %xmm14 + addpd %xmm9, %xmm1 + movslq %eax, %rax + movaps %xmm14, %xmm3 + movslq %edx, %rdx + movsd -128(%rax, %rcx), %xmm13 + movsd (%rcx, %rax), %xmm15 + movhpd -128(%rdx, %rcx), %xmm13 + movhpd (%rcx, %rdx), %xmm15 + andnps %xmm13, %xmm3 + andps %xmm14, %xmm15 + orps %xmm15, %xmm3 + andnps %xmm3, %xmm10 + orps %xmm4, %xmm10 + addpd %xmm1, %xmm10 + pxor %xmm10, %xmm0 + ret END(_ZGVbN2v_atan_sse4) - .section .rodata, "a" - .align 16 + .section .rodata, "a" + .align 16 #ifdef __svml_datan_data_internal_avx512_typedef typedef unsigned int VUINT32; typedef struct { - __declspec(align(16)) VUINT32 AbsMask[2][2]; - __declspec(align(16)) VUINT32 Shifter[2][2]; - __declspec(align(16)) VUINT32 MaxThreshold[2][2]; - __declspec(align(16)) VUINT32 MOne[2][2]; - __declspec(align(16)) VUINT32 One[2][2]; - __declspec(align(16)) VUINT32 LargeX[2][2]; - __declspec(align(16)) VUINT32 Zero[2][2]; - __declspec(align(16)) VUINT32 Tbl_H[32][2]; - __declspec(align(16)) VUINT32 Tbl_L[32][2]; - __declspec(align(16)) VUINT32 dIndexMed[2][2]; - __declspec(align(16)) VUINT32 Pi2[2][2]; - __declspec(align(16)) VUINT32 Pi2_low[2][2]; - __declspec(align(16)) VUINT32 coeff[6][2][2]; - } __svml_datan_data_internal_avx512; + __declspec(align(16)) VUINT32 AbsMask[2][2]; + __declspec(align(16)) VUINT32 Shifter[2][2]; + __declspec(align(16)) VUINT32 MaxThreshold[2][2]; + __declspec(align(16)) VUINT32 MOne[2][2]; + __declspec(align(16)) VUINT32 One[2][2]; + __declspec(align(16)) VUINT32 LargeX[2][2]; + __declspec(align(16)) VUINT32 Zero[2][2]; + __declspec(align(16)) VUINT32 Tbl_H[32][2]; + __declspec(align(16)) VUINT32 Tbl_L[32][2]; + __declspec(align(16)) VUINT32 dIndexMed[2][2]; + __declspec(align(16)) VUINT32 Pi2[2][2]; + __declspec(align(16)) VUINT32 Pi2_low[2][2]; + __declspec(align(16)) VUINT32 coeff[6][2][2]; +} __svml_datan_data_internal_avx512; #endif __svml_datan_data_internal_avx512: - /*== AbsMask ==*/ - .quad 0x7fffffffffffffff, 0x7fffffffffffffff - /*== Shifter ==*/ - .align 16 - .quad 0x4318000000000000, 0x4318000000000000 - /*== MaxThreshold ==*/ - .align 16 - .quad 0x401f800000000000, 0x401f800000000000 - /*== MOne ==*/ - .align 16 - .quad 0xbff0000000000000, 0xbff0000000000000 - /*== One ==*/ - .align 16 - .quad 0x3ff0000000000000, 0x3ff0000000000000 - /*== LargeX ==*/ - .align 16 - .quad 0x47f0000000000000, 0x47f0000000000000 - /*== Zero ==*/ - .align 16 - .quad 0x0000000000000000, 0x0000000000000000 - /*== Tbl_H ==*/ - .align 16 - .quad 0x0000000000000000, 0x3fcf5b75f92c80dd - .quad 0x3fddac670561bb4f, 0x3fe4978fa3269ee1 - .quad 0x3fe921fb54442d18, 0x3fecac7c57846f9e - .quad 0x3fef730bd281f69b, 0x3ff0d38f2c5ba09f - .quad 0x3ff1b6e192ebbe44, 0x3ff270ef55a53a25 - .quad 0x3ff30b6d796a4da8, 0x3ff38d6a6ce13353 - .quad 0x3ff3fc176b7a8560, 0x3ff45b54837351a0 - .quad 0x3ff4ae10fc6589a5, 0x3ff4f68dea672617 - .quad 0x3ff5368c951e9cfd, 0x3ff56f6f33a3e6a7 - .quad 0x3ff5a25052114e60, 0x3ff5d013c41adabd - .quad 0x3ff5f97315254857, 0x3ff61f06c6a92b89 - .quad 0x3ff6414d44094c7c, 0x3ff660b02c736a06 - .quad 0x3ff67d8863bc99bd, 0x3ff698213a9d5053 - .quad 0x3ff6b0bae830c070, 0x3ff6c78c7edeb195 - .quad 0x3ff6dcc57bb565fd, 0x3ff6f08f07435fec - .quad 0x3ff7030cf9403197, 0x3ff7145eac2088a4 - /*== Tbl_L ==*/ - .align 16 - .quad 0x0000000000000000, 0x3c68ab6e3cf7afbd - .quad 0x3c7a2b7f222f65e2, 0x3c72419a87f2a458 - .quad 0x3c81a62633145c07, 0x3c80dae13ad18a6b - .quad 0x3c7007887af0cbbd, 0xbc9bd0dc231bfd70 - .quad 0x3c9b1b466a88828e, 0xbc9a66b1af5f84fb - .quad 0x3c96254cb03bb199, 0xbc812c77e8a80f5c - .quad 0xbc4441a3bd3f1084, 0x3c79e4a72eedacc4 - .quad 0xbc93b03e8a27f555, 0x3c9934f9f2b0020e - .quad 0xbc996f47948a99f1, 0xbc7df6edd6f1ec3b - .quad 0x3c78c2d0c89de218, 0x3c9f82bba194dd5d - .quad 0xbc831151a43b51ca, 0xbc8487d50bceb1a5 - .quad 0xbc9c5f60a65c7397, 0xbc7acb6afb332a0f - .quad 0xbc99b7bd2e1e8c9c, 0xbc9b9839085189e3 - .quad 0xbc97d1ab82ffb70b, 0x3c99239ad620ffe2 - .quad 0xbc929c86447928e7, 0xbc8957a7170df016 - .quad 0xbc7cbe1896221608, 0xbc9fda5797b32a0b - /*== dIndexMed ==*/ - .align 16 - .quad 0x4318000000000010, 0x4318000000000010 - /*== Pi2 ==*/ - .align 16 - .quad 0x3ff921fb54442d18, 0x3ff921fb54442d18 - /*== Pi2_low ==*/ - .align 16 - .quad 0x3c91a62633145c07, 0x3c91a62633145c07 - /*== coeff6 ==*/ - .align 16 - .quad 0x3fb2e9b9f5c4fe97, 0x3fb2e9b9f5c4fe97 - .quad 0xbfb74257c46790cc, 0xbfb74257c46790cc - .quad 0x3fbc71bfeff916a0, 0x3fbc71bfeff916a0 - .quad 0xbfc249248eef04da, 0xbfc249248eef04da - .quad 0x3fc999999998741e, 0x3fc999999998741e - .quad 0xbfd555555555554d, 0xbfd555555555554d - .align 16 - .type __svml_datan_data_internal_avx512,@object - .size __svml_datan_data_internal_avx512,.-__svml_datan_data_internal_avx512 - .align 16 + /* AbsMask */ + .quad 0x7fffffffffffffff, 0x7fffffffffffffff + /* Shifter */ + .align 16 + .quad 0x4318000000000000, 0x4318000000000000 + /* MaxThreshold */ + .align 16 + .quad 0x401f800000000000, 0x401f800000000000 + /* MOne */ + .align 16 + .quad 0xbff0000000000000, 0xbff0000000000000 + /* One */ + .align 16 + .quad 0x3ff0000000000000, 0x3ff0000000000000 + /* LargeX */ + .align 16 + .quad 0x47f0000000000000, 0x47f0000000000000 + /* Zero */ + .align 16 + .quad 0x0000000000000000, 0x0000000000000000 + /* Tbl_H */ + .align 16 + .quad 0x0000000000000000, 0x3fcf5b75f92c80dd + .quad 0x3fddac670561bb4f, 0x3fe4978fa3269ee1 + .quad 0x3fe921fb54442d18, 0x3fecac7c57846f9e + .quad 0x3fef730bd281f69b, 0x3ff0d38f2c5ba09f + .quad 0x3ff1b6e192ebbe44, 0x3ff270ef55a53a25 + .quad 0x3ff30b6d796a4da8, 0x3ff38d6a6ce13353 + .quad 0x3ff3fc176b7a8560, 0x3ff45b54837351a0 + .quad 0x3ff4ae10fc6589a5, 0x3ff4f68dea672617 + .quad 0x3ff5368c951e9cfd, 0x3ff56f6f33a3e6a7 + .quad 0x3ff5a25052114e60, 0x3ff5d013c41adabd + .quad 0x3ff5f97315254857, 0x3ff61f06c6a92b89 + .quad 0x3ff6414d44094c7c, 0x3ff660b02c736a06 + .quad 0x3ff67d8863bc99bd, 0x3ff698213a9d5053 + .quad 0x3ff6b0bae830c070, 0x3ff6c78c7edeb195 + .quad 0x3ff6dcc57bb565fd, 0x3ff6f08f07435fec + .quad 0x3ff7030cf9403197, 0x3ff7145eac2088a4 + /* Tbl_L */ + .align 16 + .quad 0x0000000000000000, 0x3c68ab6e3cf7afbd + .quad 0x3c7a2b7f222f65e2, 0x3c72419a87f2a458 + .quad 0x3c81a62633145c07, 0x3c80dae13ad18a6b + .quad 0x3c7007887af0cbbd, 0xbc9bd0dc231bfd70 + .quad 0x3c9b1b466a88828e, 0xbc9a66b1af5f84fb + .quad 0x3c96254cb03bb199, 0xbc812c77e8a80f5c + .quad 0xbc4441a3bd3f1084, 0x3c79e4a72eedacc4 + .quad 0xbc93b03e8a27f555, 0x3c9934f9f2b0020e + .quad 0xbc996f47948a99f1, 0xbc7df6edd6f1ec3b + .quad 0x3c78c2d0c89de218, 0x3c9f82bba194dd5d + .quad 0xbc831151a43b51ca, 0xbc8487d50bceb1a5 + .quad 0xbc9c5f60a65c7397, 0xbc7acb6afb332a0f + .quad 0xbc99b7bd2e1e8c9c, 0xbc9b9839085189e3 + .quad 0xbc97d1ab82ffb70b, 0x3c99239ad620ffe2 + .quad 0xbc929c86447928e7, 0xbc8957a7170df016 + .quad 0xbc7cbe1896221608, 0xbc9fda5797b32a0b + /* dIndexMed */ + .align 16 + .quad 0x4318000000000010, 0x4318000000000010 + /* Pi2 */ + .align 16 + .quad 0x3ff921fb54442d18, 0x3ff921fb54442d18 + /* Pi2_low */ + .align 16 + .quad 0x3c91a62633145c07, 0x3c91a62633145c07 + /* coeff6 */ + .align 16 + .quad 0x3fb2e9b9f5c4fe97, 0x3fb2e9b9f5c4fe97 + .quad 0xbfb74257c46790cc, 0xbfb74257c46790cc + .quad 0x3fbc71bfeff916a0, 0x3fbc71bfeff916a0 + .quad 0xbfc249248eef04da, 0xbfc249248eef04da + .quad 0x3fc999999998741e, 0x3fc999999998741e + .quad 0xbfd555555555554d, 0xbfd555555555554d + .align 16 + .type __svml_datan_data_internal_avx512, @object + .size __svml_datan_data_internal_avx512, .-__svml_datan_data_internal_avx512 + .align 16 .FLT_11: - .long 0x00000078,0x00000000,0x00000078,0x00000000 - .type .FLT_11,@object - .size .FLT_11,16 + .long 0x00000078, 0x00000000, 0x00000078, 0x00000000 + .type .FLT_11, @object + .size .FLT_11, 16