From patchwork Mon Feb 7 06:38:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Noah Goldstein X-Patchwork-Id: 50849 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8386B385841F for ; Mon, 7 Feb 2022 06:39:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8386B385841F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1644215963; bh=BW6NKyrm69wxlVkCiT4PL6DDfikGxFRBJijgljI35OY=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=QIUC7x0x9ErHPGVGCM5Jf+mfbxx5v1lyE2l6tRZTQi8auwXCgY4Zpj7JdSXjKBFNI hM7NsD2izDfkLxUIJbO4O2M9rbclJkt8NlYGLumKsph1sEScZWWT0LeYwfgjDEWNVw zJ861w6fHFGgxCOoRj3vvtLHoVlPJcipKp0Z4ONs= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-io1-xd31.google.com (mail-io1-xd31.google.com [IPv6:2607:f8b0:4864:20::d31]) by sourceware.org (Postfix) with ESMTPS id 0E1B23858C83 for ; Mon, 7 Feb 2022 06:39:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0E1B23858C83 Received: by mail-io1-xd31.google.com with SMTP id d188so15485239iof.7 for ; Sun, 06 Feb 2022 22:39:02 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BW6NKyrm69wxlVkCiT4PL6DDfikGxFRBJijgljI35OY=; b=Bl2hqgd082KdIdk5m5ASKMK78TqNBNnrJHf/hE7WXPQWbZ5lNeQRjzF2S9UhbvdWZ2 gyj38Mmyf1UFfGAjogtraOEBvrwUMPPXYB2j1qyda9mglgjOWO1isaz640Rv3ofWtRFk 7ORQVxibckS5VR62lqQRb30jig45NVc0YDt4HxE5oy4rdZ94+5+6V+XFHpzVSDQVVLMT zU0K1PMTPRlpQkok+EywAMdAPtnSbrGqPQ7O4tHgTK16XwRU+AaZ09mI4580VCGCS+kg 409K1LrPgfQp7LgvfVwwa88iQ0C2yxCXnGyOGX7FQOhFIBuMNK7EnGbey/JhPL4aHllH qS/Q== X-Gm-Message-State: AOAM533iUuSVoOqf7qhOYSlybM28m4OoRcrUFL1qM7SS9RreP09h+8XF 0Snp+CJ7YP58KFrRKzB252/CqkcJ2Fc= X-Google-Smtp-Source: ABdhPJxaMc+Wm/CDNagmgQQk/HUhn0HwXffN/f3MqR7cz7rF14neOqQG+rEuOVFhGEV4RGVNTP5NEA== X-Received: by 2002:a05:6602:1350:: with SMTP id i16mr5350704iov.153.1644215941070; Sun, 06 Feb 2022 22:39:01 -0800 (PST) Received: from localhost.localdomain (node-17-161.flex.volo.net. [76.191.17.161]) by smtp.googlemail.com with ESMTPSA id l6sm855883ilt.16.2022.02.06.22.39.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 22:39:00 -0800 (PST) To: libc-alpha@sourceware.org Subject: [PATCH v1] x86: Remove SSE3 instruction for broadcast in memset.S (SSE2 Only) Date: Mon, 7 Feb 2022 00:38:54 -0600 Message-Id: <20220207063854.3324172-1-goldstein.w.n@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Noah Goldstein via Libc-alpha From: Noah Goldstein Reply-To: Noah Goldstein Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" commit b62ace2740a106222e124cc86956448fa07abf4d Author: Noah Goldstein Date: Sun Feb 6 00:54:18 2022 -0600 x86: Improve vec generation in memset-vec-unaligned-erms.S Revert usage of 'pshufb' in broadcast logic as it is an SSE3 instruction and memset.S is restricted to only SSE2 instructions. --- sysdeps/x86_64/memset.S | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/sysdeps/x86_64/memset.S b/sysdeps/x86_64/memset.S index ccf036be53..148553cf3d 100644 --- a/sysdeps/x86_64/memset.S +++ b/sysdeps/x86_64/memset.S @@ -28,22 +28,23 @@ #define VMOVU movups #define VMOVA movaps -# define MEMSET_SET_VEC0_AND_SET_RETURN(d, r) \ +#define MEMSET_SET_VEC0_AND_SET_RETURN(d, r) \ movd d, %xmm0; \ - pxor %xmm1, %xmm1; \ - pshufb %xmm1, %xmm0; \ - movq r, %rax + movq r, %rax; \ + punpcklbw %xmm0, %xmm0; \ + punpcklwd %xmm0, %xmm0; \ + pshufd $0, %xmm0, %xmm0 -# define WMEMSET_SET_VEC0_AND_SET_RETURN(d, r) \ +#define WMEMSET_SET_VEC0_AND_SET_RETURN(d, r) \ movd d, %xmm0; \ pshufd $0, %xmm0, %xmm0; \ movq r, %rax -# define MEMSET_VDUP_TO_VEC0_HIGH() -# define MEMSET_VDUP_TO_VEC0_LOW() +#define MEMSET_VDUP_TO_VEC0_HIGH() +#define MEMSET_VDUP_TO_VEC0_LOW() -# define WMEMSET_VDUP_TO_VEC0_HIGH() -# define WMEMSET_VDUP_TO_VEC0_LOW() +#define WMEMSET_VDUP_TO_VEC0_HIGH() +#define WMEMSET_VDUP_TO_VEC0_LOW() #define SECTION(p) p