From patchwork Wed Aug 19 10:45:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sajan Karumanchi X-Patchwork-Id: 40285 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 271AB386F41E; Wed, 19 Aug 2020 10:56:45 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 271AB386F41E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1597834605; bh=1MI3fLpLaH2I/rxEdgEItSU8B+FWZn4e5cjTkVo5+1s=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=sQDCuoAQOsEbU5EIPhDHuwUIAVEWhPHdlZz7nI9ls2Px0H0Q28H465roRGp6ttOCG iARjHZaYVL4pPBmDSy6kGY8RatjTaEtQib9xwab2thBmvuvLclB5G01oIyWmUL4n1z OSm5L6RDKO0P4fgqboAhkoHGtHZsJJgJKL4BqC4I= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) by sourceware.org (Postfix) with ESMTPS id 1377C386F41C for ; Wed, 19 Aug 2020 10:56:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 1377C386F41C Received: by mail-pl1-x642.google.com with SMTP id v16so1036694plo.1 for ; Wed, 19 Aug 2020 03:56:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1MI3fLpLaH2I/rxEdgEItSU8B+FWZn4e5cjTkVo5+1s=; b=KTpnbHXU7b81gS0uOggfEyfHNUYWK23646YKoZwB80YZ54zcCnZaK+f/nwGjc3OTHH GAwUU8SsSEkjKdCROV1Ny3XrOOruwih/jAqdbZnHieiYoj/pqjoMaVSIGNB2WK5OHmyy Oc7qOkaRebbBnm33OXbmaE6ADDnDlh0iHU2XotyrI8ymVv3A3U5D/Lbn4NB+JoC1Qq/c lVqoqF4Au4ktQUVXbi5l1DpTDvDnRt0t7BG89vLaTU2r0NUIl89sihGo/YAeJOtwB4KI ouq94NvaLkBve2FrAylsV8diEoFTJhAXRx3HEqSxmn2hPFO9lTAgC8/hrB2CVP1cEFze lI6w== X-Gm-Message-State: AOAM5334KgQaNgZA8GManlOhHDUvwiFQomJlWaFMmFeTvU22eV8gJPiI 3BdQ6h+WvN3O9w/qebzEeB2wMYl+v48dZw== X-Google-Smtp-Source: ABdhPJzMdBKLf5H+Q5N+awGhIVICOna8W9RO82qmOtFFUFlfa1wWzqnWuoU8k6sexKqzk+ZHa3la2A== X-Received: by 2002:a17:90b:4b89:: with SMTP id lr9mr3868932pjb.190.1597834601759; Wed, 19 Aug 2020 03:56:41 -0700 (PDT) Received: from lib-golemit-02.amd.com ([165.204.156.251]) by smtp.googlemail.com with ESMTPSA id p9sm2861066pjm.1.2020.08.19.03.56.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2020 03:56:41 -0700 (PDT) X-Google-Original-From: Sajan Karumanchi To: libc-alpha@sourceware.org, carlos@redhat.com Subject: [PATCH 1/1] x86: Tuning NT Threshold parameter for AMD machines. Date: Wed, 19 Aug 2020 16:15:39 +0530 Message-Id: <20200819104539.9854-2-sajan.karumanchi@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200819104539.9854-1-sajan.karumanchi@amd.com> References: <20200819104539.9854-1-sajan.karumanchi@amd.com> X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sajan Karumanchi via Libc-alpha From: Sajan Karumanchi Reply-To: Sajan Karumanchi Cc: Sajan Karumanchi , premachandra.mallappa@amd.com Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" Tuning NT threshold parameter to bring in performance gains of memcpy/memove on AMD cpu's. Based on Large and Walk bench variant results, setting __x86_shared_non_temporal_threshold to 2/3 of shared cache size brings in performance gains for memcpy/memmove on AMD machines. Reviewed-by: Premachandra Mallappa Signed-off-by: Premachandra Mallappa Signed-off-by: Sajan Karumanchi --- sysdeps/x86/cacheinfo.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index 217c21c34f..5487f382a8 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -829,7 +829,8 @@ init_cacheinfo (void) } if (cpu_features->data_cache_size != 0) - data = cpu_features->data_cache_size; + if (data == 0 || cpu_features->basic.kind != arch_kind_amd) + data = cpu_features->data_cache_size; if (data > 0) { @@ -842,7 +843,8 @@ init_cacheinfo (void) } if (cpu_features->shared_cache_size != 0) - shared = cpu_features->shared_cache_size; + if (shared == 0 || cpu_features->basic.kind != arch_kind_amd) + shared = cpu_features->shared_cache_size; if (shared > 0) { @@ -854,6 +856,17 @@ init_cacheinfo (void) __x86_shared_cache_size = shared; } + if (cpu_features->basic.kind == arch_kind_amd) + { + /* Large and Walk benchmarks in glibc shows 2/3 shared cache size is + the threshold value above which non-temporal store is performing better */ + __x86_shared_non_temporal_threshold + = (cpu_features->non_temporal_threshold != 0 + ? cpu_features->non_temporal_threshold + : __x86_shared_cache_size * 2 / 3); + } + else + { /* The large memcpy micro benchmark in glibc shows that 6 times of shared cache size is the approximate value above which non-temporal store becomes faster on a 8-core processor. This is the 3/4 of the @@ -862,6 +875,7 @@ init_cacheinfo (void) = (cpu_features->non_temporal_threshold != 0 ? cpu_features->non_temporal_threshold : __x86_shared_cache_size * threads * 3 / 4); + } /* NB: The REP MOVSB threshold must be greater than VEC_SIZE * 8. */ unsigned int minimum_rep_movsb_threshold;