From patchwork Wed Apr 10 10:32:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Schwidefsky X-Patchwork-Id: 32245 Received: (qmail 47741 invoked by alias); 10 Apr 2019 10:33:09 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 47444 invoked by uid 89); 10 Apr 2019 10:33:08 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-13.9 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KHOP_DYNAMIC, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=MIT, HX-Languages-Length:3109, reality X-HELO: mx0a-001b2d01.pphosted.com Date: Wed, 10 Apr 2019 12:32:58 +0200 From: Martin Schwidefsky To: Mathieu Desnoyers Cc: heiko carstens , gor , libc-alpha , linux-kernel , "Carlos O'Donell" Subject: Re: rseq/s390: choosing code signature In-Reply-To: <1779981820.2626.1554838342731.JavaMail.zimbra@efficios.com> References: <1779981820.2626.1554838342731.JavaMail.zimbra@efficios.com> MIME-Version: 1.0 x-cbid: 19041010-0028-0000-0000-0000035F450D X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19041010-0029-0000-0000-0000241E66E3 Message-Id: <20190410123258.37f182cf@mschwideX1> On Tue, 9 Apr 2019 15:32:22 -0400 (EDT) Mathieu Desnoyers wrote: > Hi, > > We are about to include the code signature required prior to restartable > sequences abort handlers into glibc, which will make this ABI choice final. > We need architecture maintainer input on that signature value. > > That code signature is placed before each abort handler, so the kernel can > validate that it is indeed jumping to an abort handler (and not some > arbitrary attacker-chosen code). The signature is never executed. > > The current discussion thread on the glibc mailing list leads us towards > using a trap with uncommon immediate operand, which simplifies integration > with disassemblers, emulators, makes it easier to debug if the control > flow gets redirected there by mistake, and is nicer for some architecture's > speculative execution. > > We can have different signatures for each sub-architecture, as long as they > don't have to co-exist within the same process. We can special-case with > #ifdef for each sub-architecture and endianness if need be. If the architecture > has instruction set extensions that can co-exist with the architecture > instruction set within the same process, we need to take into account to which > instruction the chosen signature value would map (and possibly decide if we > need to extend rseq to support many signatures). > > Here is an example of rseq signature definition template: > > /* > * TODO: document trap instruction objdump output on each sub-architecture > * instruction sets, as well as instruction set extensions. > */ > #define RSEQ_SIG 0x######## > > Ideally we'd need a patch on top of the Linux kernel > tools/testing/selftests/rseq/rseq-s390.h file that updates > the signature value, so I can then pick it up for the glibc > patchset. The trap4 instruction is a suitable one. The patch would look like this --- commit 2ee28f6d1de968a71f074ab150384b90b4121216 Author: Martin Schwidefsky Date: Wed Apr 10 12:28:41 2019 +0200 s390/rseq: use trap4 for RSEQ_SIG Use trap4 as the guard instruction for the restartable sequence abort handler. Signed-off-by: Martin Schwidefsky diff --git a/tools/testing/selftests/rseq/rseq-s390.h b/tools/testing/selftests/rseq/rseq-s390.h index 1069e85258ce..d4c8e1147d86 100644 --- a/tools/testing/selftests/rseq/rseq-s390.h +++ b/tools/testing/selftests/rseq/rseq-s390.h @@ -1,6 +1,13 @@ /* SPDX-License-Identifier: LGPL-2.1 OR MIT */ -#define RSEQ_SIG 0x53053053 +/* + * RSEQ_SIG uses the trap4 instruction. As Linux does not make use of the + * access-register mode nor the linkage stack this instruction will always + * cause a special-operation exception (the trap-enabled bit in the DUCT + * is and will stay 0). The instruction pattern is + * b2 ff 0f ff trap4 4095(%r0) + */ +#define RSEQ_SIG 0xB2FF0FFF #define rseq_smp_mb() __asm__ __volatile__ ("bcr 15,0" ::: "memory") #define rseq_smp_rmb() rseq_smp_mb()