diff mbox

elf: Update GNU_PROPERTY_X86_XXX macros [BZ #23797]

Message ID 20181019224743.9457-1-hjl.tools@gmail.com
State New, archived
Headers show

Commit Message

H.J. Lu Oct. 19, 2018, 10:47 p.m. UTC
This patch updates GNU_PROPERTY_X86_XXX macros according to the x86
program property in x86-64 psABI:

https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-property.pdf

1. GNU_PROPERTY_X86_UINT32_AND_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in all relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_AND_LO      0xc0000002
 #define GNU_PROPERTY_X86_UINT32_AND_HI      0xc0007fff

2. GNU_PROPERTY_X86_UINT32_OR_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in any relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_OR_LO    0xc0008000
 #define GNU_PROPERTY_X86_UINT32_OR_HI    0xc000ffff

3. GNU_PROPERTY_X86_UINT32_OR_AND_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in any relocatable inputs and the property is
present in all relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_OR_AND_LO   0xc0010000
 #define GNU_PROPERTY_X86_UINT32_OR_AND_HI   0xc0017fff

4. GNU_PROPERTY_X86_FEATURE_2_NEEDED, GNU_PROPERTY_X86_FEATURE_2_USED
and GNU_PROPERTY_X86_FEATURE_2_XXX bits.

GNU_PROPERTY_X86_FEATURE_1_AND is unchanged.  GNU_PROPERTY_X86_ISA_1_USED
and GNU_PROPERTY_X86_FEATURE_2_USED are redefined to better support
targeted processors since GNU_PROPERTY_X86_ISA_1_?86 aren't isn't very
useful.  A new set of GNU_PROPERTY_X86_ISA_1_XXX bits are defined.  The
previous GNU_PROPERTY_X86_ISA_1_XXX macros are removed.

	[BZ #23797]
	* elf.h (GNU_PROPERTY_X86_UINT32_AND_LO): New.
	(GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
	(GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
	(GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
	(GNU_PROPERTY_X86_UINT32_AND_LO + 0).
	(GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
	(GNU_PROPERTY_X86_UINT32_OR_LO + 0).
	(GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
	(GNU_PROPERTY_X86_UINT32_OR_LO + 1).
	(GNU_PROPERTY_X86_ISA_1_USED): Defined to
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
	(GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
---
 elf/elf.h | 98 +++++++++++++++++++++++++++++++++++++++++--------------
 1 file changed, 73 insertions(+), 25 deletions(-)

Comments

Florian Weimer Oct. 20, 2018, 9:32 a.m. UTC | #1
* H. J. Lu:

> +#define GNU_PROPERTY_X86_ISA_1_CMOV		(1U << 0)
> +#define GNU_PROPERTY_X86_ISA_1_SSE		(1U << 1)
> +#define GNU_PROPERTY_X86_ISA_1_SSE2		(1U << 2)
> +#define GNU_PROPERTY_X86_ISA_1_SSE3		(1U << 3)
> +#define GNU_PROPERTY_X86_ISA_1_SSSE3		(1U << 4)
> +#define GNU_PROPERTY_X86_ISA_1_SSE4_1		(1U << 5)
> +#define GNU_PROPERTY_X86_ISA_1_SSE4_2		(1U << 6)
> +#define GNU_PROPERTY_X86_ISA_1_AVX		(1U << 7)
> +#define GNU_PROPERTY_X86_ISA_1_AVX2		(1U << 8)
> +#define GNU_PROPERTY_X86_ISA_1_FMA		(1U << 9)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512F		(1U << 10)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512CD		(1U << 11)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512ER		(1U << 12)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512PF		(1U << 13)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512VL		(1U << 14)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512DQ		(1U << 15)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512BW		(1U << 16)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS	(1U << 17)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW	(1U << 18)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512_BITALG	(1U << 19)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512_IFMA	(1U << 20)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI	(1U << 21)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2	(1U << 22)
> +#define GNU_PROPERTY_X86_ISA_1_AVX512_VNNI	(1U << 23)

What guides the selection of flags?  Why is there CMOV (which
presumably implies FCMOV), but not CMPXCHG16B?  What about TZCNT,
which silently executed incorrectly if the CPU does not support it?

Which FMA is FMA?

> +#define GNU_PROPERTY_X86_FEATURE_2_X86		(1U << 0)
> +#define GNU_PROPERTY_X86_FEATURE_2_X87		(1U << 1)
> +#define GNU_PROPERTY_X86_FEATURE_2_MMX		(1U << 2)
> +#define GNU_PROPERTY_X86_FEATURE_2_XMM		(1U << 3)
> +#define GNU_PROPERTY_X86_FEATURE_2_YMM		(1U << 4)
> +#define GNU_PROPERTY_X86_FEATURE_2_ZMM		(1U << 5)
> +#define GNU_PROPERTY_X86_FEATURE_2_FXSR		(1U << 6)
> +#define GNU_PROPERTY_X86_FEATURE_2_XSAVE	(1U << 7)
> +#define GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT	(1U << 8)
> +#define GNU_PROPERTY_X86_FEATURE_2_XSAVEC	(1U << 9)

What's the difference between an ISA and a feature?
H.J. Lu Oct. 20, 2018, 10:37 p.m. UTC | #2
On 10/20/18, Florian Weimer <fw@deneb.enyo.de> wrote:
> * H. J. Lu:
>
>> +#define GNU_PROPERTY_X86_ISA_1_CMOV		(1U << 0)
>> +#define GNU_PROPERTY_X86_ISA_1_SSE		(1U << 1)
>> +#define GNU_PROPERTY_X86_ISA_1_SSE2		(1U << 2)
>> +#define GNU_PROPERTY_X86_ISA_1_SSE3		(1U << 3)
>> +#define GNU_PROPERTY_X86_ISA_1_SSSE3		(1U << 4)
>> +#define GNU_PROPERTY_X86_ISA_1_SSE4_1		(1U << 5)
>> +#define GNU_PROPERTY_X86_ISA_1_SSE4_2		(1U << 6)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX		(1U << 7)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX2		(1U << 8)
>> +#define GNU_PROPERTY_X86_ISA_1_FMA		(1U << 9)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512F		(1U << 10)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512CD		(1U << 11)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512ER		(1U << 12)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512PF		(1U << 13)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512VL		(1U << 14)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512DQ		(1U << 15)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512BW		(1U << 16)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS	(1U << 17)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW	(1U << 18)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512_BITALG	(1U << 19)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512_IFMA	(1U << 20)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI	(1U << 21)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2	(1U << 22)
>> +#define GNU_PROPERTY_X86_ISA_1_AVX512_VNNI	(1U << 23)
>
> What guides the selection of flags?  Why is there CMOV (which

I defined them since I found they useful.   We can add others.

> presumably implies FCMOV), but not CMPXCHG16B?  What about TZCNT,

FCMPVcc is covered by the CMOV bit in CPUID.   Please send what you
want to x86-64 psABI mailing list.

> which silently executed incorrectly if the CPU does not support it?

> Which FMA is FMA?

FMA is FMA from Intel SDM, not FMA4.

>> +#define GNU_PROPERTY_X86_FEATURE_2_X86		(1U << 0)
>> +#define GNU_PROPERTY_X86_FEATURE_2_X87		(1U << 1)
>> +#define GNU_PROPERTY_X86_FEATURE_2_MMX		(1U << 2)
>> +#define GNU_PROPERTY_X86_FEATURE_2_XMM		(1U << 3)
>> +#define GNU_PROPERTY_X86_FEATURE_2_YMM		(1U << 4)
>> +#define GNU_PROPERTY_X86_FEATURE_2_ZMM		(1U << 5)
>> +#define GNU_PROPERTY_X86_FEATURE_2_FXSR		(1U << 6)
>> +#define GNU_PROPERTY_X86_FEATURE_2_XSAVE	(1U << 7)
>> +#define GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT	(1U << 8)
>> +#define GNU_PROPERTY_X86_FEATURE_2_XSAVEC	(1U << 9)
>
> What's the difference between an ISA and a feature?

There is no exact boundary.  SSE contains instructions with MMX registers.
The SSE ISA bit does't tell us if MMX registers are used.
Mark Wielaard Oct. 24, 2018, 11:03 a.m. UTC | #3
Hi,

Some questions about how to interpret the new constant values vs the
old ones. I am not sure I understand how this is fully backwards
compatible.

On Fri, 2018-10-19 at 15:47 -0700, H.J. Lu wrote:
> GNU_PROPERTY_X86_FEATURE_1_AND is unchanged.  GNU_PROPERTY_X86_ISA_1_USED
> and GNU_PROPERTY_X86_FEATURE_2_USED are redefined to better support
> targeted processors since GNU_PROPERTY_X86_ISA_1_?86 aren't isn't very
> useful.  A new set of GNU_PROPERTY_X86_ISA_1_XXX bits are defined.  The
> previous GNU_PROPERTY_X86_ISA_1_XXX macros are removed.

So GNU_PROPERTY_X86_FEATURE_1_AND is kept at the same constant value,
but now falls into the GNU_PROPERTY_X86_UINT32_AND_XXX range which has
specific semantics for how linkers combine the note data. Isn't this a
backwards compatible issue? There is no guarantee the note data was
constructed by a linker that knows about this, but there is no way to
detect that?

GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_FEATURE_2_USED are
renumbered. And the the GNU_PROPERTY_X86_ISA_1_XXX macros are renamed,
but some are kept the same with new constant values. Were the old
constants/names not used at all?

> +/* Set by linker to indicate that the property is valid.  */
> +#define GNU_PROPERTY_X86_UINT32_VALID		(1U << 31)

This isn't mentioned in your commit message, nor is it mentioned in the
ChangeLog entry. Should it be added? And if so, how does it interact
with the interpretation of GNU_PROPERTY_X86_FEATURE_1_AND generated by
older linkers or interpreted by older loaders (does it have to be
checked by newer loaders?)

Thanks,

Mark
Mark Wielaard Oct. 29, 2018, 12:11 a.m. UTC | #4
Hi,

On Wed, 2018-10-24 at 13:03 +0200, Mark Wielaard wrote:
> Some questions about how to interpret the new constant values vs the
> old ones. I am not sure I understand how this is fully backwards
> compatible.

Currently the elfutils code just handles GNU_PROPERTY_STACK_SIZE,
GNU_PROPERTY_NO_COPY_ON_PROTECTED and GNU_PROPERTY_X86_FEATURE_1_AND
with IBT and SHSTK. But none of the other types/data that would be
renamed/renumbered with this patch.

It would be really helpful if you could answer the questions below to
better understand how this new data fits in and what the backwards
compatibility story is.

Thanks,

Mark

> On Fri, 2018-10-19 at 15:47 -0700, H.J. Lu wrote:
> > GNU_PROPERTY_X86_FEATURE_1_AND is
> > unchanged.  GNU_PROPERTY_X86_ISA_1_USED
> > and GNU_PROPERTY_X86_FEATURE_2_USED are redefined to better support
> > targeted processors since GNU_PROPERTY_X86_ISA_1_?86 aren't isn't
> > very
> > useful.  A new set of GNU_PROPERTY_X86_ISA_1_XXX bits are
> > defined.  The
> > previous GNU_PROPERTY_X86_ISA_1_XXX macros are removed.
> 
> So GNU_PROPERTY_X86_FEATURE_1_AND is kept at the same constant value,
> but now falls into the GNU_PROPERTY_X86_UINT32_AND_XXX range which
> has
> specific semantics for how linkers combine the note data. Isn't this
> a
> backwards compatible issue? There is no guarantee the note data was
> constructed by a linker that knows about this, but there is no way to
> detect that?
> 
> GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_FEATURE_2_USED are
> renumbered. And the the GNU_PROPERTY_X86_ISA_1_XXX macros are
> renamed,
> but some are kept the same with new constant values. Were the old
> constants/names not used at all?
> 
> > +/* Set by linker to indicate that the property is valid.  */
> > +#define GNU_PROPERTY_X86_UINT32_VALID		(1U << 31)
> 
> This isn't mentioned in your commit message, nor is it mentioned in
> the
> ChangeLog entry. Should it be added? And if so, how does it interact
> with the interpretation of GNU_PROPERTY_X86_FEATURE_1_AND generated
> by
> older linkers or interpreted by older loaders (does it have to be
> checked by newer loaders?)
> 
> Thanks,
> 
> Mark
H.J. Lu Oct. 29, 2018, 12:59 p.m. UTC | #5
On Wed, Oct 24, 2018 at 4:03 AM Mark Wielaard <mark@klomp.org> wrote:
>
> Hi,
>
> Some questions about how to interpret the new constant values vs the
> old ones. I am not sure I understand how this is fully backwards
> compatible.

Since property note is optional, tools can ignore old note values.

> On Fri, 2018-10-19 at 15:47 -0700, H.J. Lu wrote:
> > GNU_PROPERTY_X86_FEATURE_1_AND is unchanged.  GNU_PROPERTY_X86_ISA_1_USED
> > and GNU_PROPERTY_X86_FEATURE_2_USED are redefined to better support
> > targeted processors since GNU_PROPERTY_X86_ISA_1_?86 aren't isn't very
> > useful.  A new set of GNU_PROPERTY_X86_ISA_1_XXX bits are defined.  The
> > previous GNU_PROPERTY_X86_ISA_1_XXX macros are removed.
>
> So GNU_PROPERTY_X86_FEATURE_1_AND is kept at the same constant value,
> but now falls into the GNU_PROPERTY_X86_UINT32_AND_XXX range which has
> specific semantics for how linkers combine the note data. Isn't this a
> backwards compatible issue? There is no guarantee the note data was
> constructed by a linker that knows about this, but there is no way to
> detect that?

The semantics of GNU_PROPERTY_X86_FEATURE_1_AND are extended to
 the GNU_PROPERTY_X86_UINT32_AND_XXX range.  Old linkers will ignore
new values.   Of course, you won't get new features with old linkers.

> GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_FEATURE_2_USED are
> renumbered. And the the GNU_PROPERTY_X86_ISA_1_XXX macros are renamed,
> but some are kept the same with new constant values. Were the old
> constants/names not used at all?

If any tools are using old properties, they are ignored.

> > +/* Set by linker to indicate that the property is valid.  */
> > +#define GNU_PROPERTY_X86_UINT32_VALID                (1U << 31)
>
> This isn't mentioned in your commit message, nor is it mentioned in the

They just follow GNU_PROPERTY_X86_XXX macros according to the x86
program property in x86-64 psABI:

https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-property.pdf

> ChangeLog entry. Should it be added? And if so, how does it interact
> with the interpretation of GNU_PROPERTY_X86_FEATURE_1_AND generated by
> older linkers or interpreted by older loaders (does it have to be
> checked by newer loaders?)

The  interpretation of GNU_PROPERTY_X86_FEATURE_1_AND is unchanged.
H.J. Lu Oct. 29, 2018, 1:33 p.m. UTC | #6
On Sun, Oct 28, 2018 at 5:11 PM Mark Wielaard <mark@klomp.org> wrote:
>
> Hi,
>
> On Wed, 2018-10-24 at 13:03 +0200, Mark Wielaard wrote:
> > Some questions about how to interpret the new constant values vs the
> > old ones. I am not sure I understand how this is fully backwards
> > compatible.
>
> Currently the elfutils code just handles GNU_PROPERTY_STACK_SIZE,
> GNU_PROPERTY_NO_COPY_ON_PROTECTED and GNU_PROPERTY_X86_FEATURE_1_AND
> with IBT and SHSTK. But none of the other types/data that would be
> renamed/renumbered with this patch.
>
> It would be really helpful if you could answer the questions below to
> better understand how this new data fits in and what the backwards
> compatibility story is.
>

x86 assembler supports

  -mx86-used-note=[no|yes] (default: yes)
                          generate x86 used ISA and feature properties

It marks x86 objects with

[hjl@gnu-4 x32]$ readelf -n /libx32/libc-2.27.so

Displaying notes found in: .note.gnu.build-id
  Owner                 Data size Description
  GNU                  0x00000014 NT_GNU_BUILD_ID (unique build ID bitstri
ng)
    Build ID: c45c0d715994e76aa2842845502c978738d02ed6

Displaying notes found in: .note.gnu.property
  Owner                 Data size Description
  GNU                  0x00000024 NT_GNU_PROPERTY_TYPE_0
      Properties: x86 feature: IBT, SHSTK
x86 ISA used: CMOV, SSE, SSE2, SSE3, SSSE3, SSE4_1, SSE4_2, AVX, AVX2, A
VX512F
x86 feature used: x86, x87, XMM, YMM, ZMM

H.J.
diff mbox

Patch

diff --git a/elf/elf.h b/elf/elf.h
index 226e53842e..a9e54a406f 100644
--- a/elf/elf.h
+++ b/elf/elf.h
@@ -1305,33 +1305,81 @@  typedef struct
 /* Application-specific semantics, hi */
 #define GNU_PROPERTY_HIUSER			0xffffffff
 
-/* The x86 instruction sets indicated by the corresponding bits are
-   used in program.  Their support in the hardware is optional.  */
-#define GNU_PROPERTY_X86_ISA_1_USED		0xc0000000
+/* A 4-byte unsigned integer property: A bit is set if it is set in all
+   relocatable inputs.  */
+#define GNU_PROPERTY_X86_UINT32_AND_LO		0xc0000002
+#define GNU_PROPERTY_X86_UINT32_AND_HI		0xc0007fff
+
+/* A 4-byte unsigned integer property: A bit is set if it is set in any
+   relocatable inputs.  */
+#define GNU_PROPERTY_X86_UINT32_OR_LO		0xc0008000
+#define GNU_PROPERTY_X86_UINT32_OR_HI		0xc000ffff
+
+/* A 4-byte unsigned integer property: A bit is set if it is set in any
+   relocatable inputs and the property is present in all relocatable
+   inputs.  */
+#define GNU_PROPERTY_X86_UINT32_OR_AND_LO	0xc0010000
+#define GNU_PROPERTY_X86_UINT32_OR_AND_HI	0xc0017fff
+
+/* X86 processor-specific features used in program.  */
+#define GNU_PROPERTY_X86_FEATURE_1_AND \
+  (GNU_PROPERTY_X86_UINT32_AND_LO + 0)
+
 /* The x86 instruction sets indicated by the corresponding bits are
    used in program and they must be supported by the hardware.   */
-#define GNU_PROPERTY_X86_ISA_1_NEEDED		0xc0000001
-/* X86 processor-specific features used in program.  */
-#define GNU_PROPERTY_X86_FEATURE_1_AND		0xc0000002
-
-#define GNU_PROPERTY_X86_ISA_1_486		(1U << 0)
-#define GNU_PROPERTY_X86_ISA_1_586		(1U << 1)
-#define GNU_PROPERTY_X86_ISA_1_686		(1U << 2)
-#define GNU_PROPERTY_X86_ISA_1_SSE		(1U << 3)
-#define GNU_PROPERTY_X86_ISA_1_SSE2		(1U << 4)
-#define GNU_PROPERTY_X86_ISA_1_SSE3		(1U << 5)
-#define GNU_PROPERTY_X86_ISA_1_SSSE3		(1U << 6)
-#define GNU_PROPERTY_X86_ISA_1_SSE4_1		(1U << 7)
-#define GNU_PROPERTY_X86_ISA_1_SSE4_2		(1U << 8)
-#define GNU_PROPERTY_X86_ISA_1_AVX		(1U << 9)
-#define GNU_PROPERTY_X86_ISA_1_AVX2		(1U << 10)
-#define GNU_PROPERTY_X86_ISA_1_AVX512F		(1U << 11)
-#define GNU_PROPERTY_X86_ISA_1_AVX512CD		(1U << 12)
-#define GNU_PROPERTY_X86_ISA_1_AVX512ER		(1U << 13)
-#define GNU_PROPERTY_X86_ISA_1_AVX512PF		(1U << 14)
-#define GNU_PROPERTY_X86_ISA_1_AVX512VL		(1U << 15)
-#define GNU_PROPERTY_X86_ISA_1_AVX512DQ		(1U << 16)
-#define GNU_PROPERTY_X86_ISA_1_AVX512BW		(1U << 17)
+#define GNU_PROPERTY_X86_ISA_1_NEEDED \
+  (GNU_PROPERTY_X86_UINT32_OR_LO + 0)
+#define GNU_PROPERTY_X86_FEATURE_2_NEEDED \
+  (GNU_PROPERTY_X86_UINT32_OR_LO + 1)
+
+/* The x86 instruction sets indicated by the corresponding bits are
+   used in program.  Their support in the hardware is optional.  */
+#define GNU_PROPERTY_X86_ISA_1_USED \
+  (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0)
+#define GNU_PROPERTY_X86_FEATURE_2_USED \
+  (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1)
+
+/* Set by linker to indicate that the property is valid.  */
+#define GNU_PROPERTY_X86_UINT32_VALID		(1U << 31)
+
+#define GNU_PROPERTY_X86_FEATURE_1_IBT		(1U << 0)
+#define GNU_PROPERTY_X86_FEATURE_1_SHSTK	(1U << 1)
+
+#define GNU_PROPERTY_X86_ISA_1_CMOV		(1U << 0)
+#define GNU_PROPERTY_X86_ISA_1_SSE		(1U << 1)
+#define GNU_PROPERTY_X86_ISA_1_SSE2		(1U << 2)
+#define GNU_PROPERTY_X86_ISA_1_SSE3		(1U << 3)
+#define GNU_PROPERTY_X86_ISA_1_SSSE3		(1U << 4)
+#define GNU_PROPERTY_X86_ISA_1_SSE4_1		(1U << 5)
+#define GNU_PROPERTY_X86_ISA_1_SSE4_2		(1U << 6)
+#define GNU_PROPERTY_X86_ISA_1_AVX		(1U << 7)
+#define GNU_PROPERTY_X86_ISA_1_AVX2		(1U << 8)
+#define GNU_PROPERTY_X86_ISA_1_FMA		(1U << 9)
+#define GNU_PROPERTY_X86_ISA_1_AVX512F		(1U << 10)
+#define GNU_PROPERTY_X86_ISA_1_AVX512CD		(1U << 11)
+#define GNU_PROPERTY_X86_ISA_1_AVX512ER		(1U << 12)
+#define GNU_PROPERTY_X86_ISA_1_AVX512PF		(1U << 13)
+#define GNU_PROPERTY_X86_ISA_1_AVX512VL		(1U << 14)
+#define GNU_PROPERTY_X86_ISA_1_AVX512DQ		(1U << 15)
+#define GNU_PROPERTY_X86_ISA_1_AVX512BW		(1U << 16)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS	(1U << 17)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW	(1U << 18)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_BITALG	(1U << 19)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_IFMA	(1U << 20)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI	(1U << 21)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2	(1U << 22)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_VNNI	(1U << 23)
+
+#define GNU_PROPERTY_X86_FEATURE_2_X86		(1U << 0)
+#define GNU_PROPERTY_X86_FEATURE_2_X87		(1U << 1)
+#define GNU_PROPERTY_X86_FEATURE_2_MMX		(1U << 2)
+#define GNU_PROPERTY_X86_FEATURE_2_XMM		(1U << 3)
+#define GNU_PROPERTY_X86_FEATURE_2_YMM		(1U << 4)
+#define GNU_PROPERTY_X86_FEATURE_2_ZMM		(1U << 5)
+#define GNU_PROPERTY_X86_FEATURE_2_FXSR		(1U << 6)
+#define GNU_PROPERTY_X86_FEATURE_2_XSAVE	(1U << 7)
+#define GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT	(1U << 8)
+#define GNU_PROPERTY_X86_FEATURE_2_XSAVEC	(1U << 9)
 
 /* This indicates that all executable sections are compatible with
    IBT.  */