diff mbox

[committed] Detect Intel Goldmont and Airmont processors

Message ID 20160415123910.GA15312@intel.com
State Committed
Headers

Commit Message

Lu, Hongjiu April 15, 2016, 12:39 p.m. UTC 
  Updated from the model numbers of Goldmont and Airmont processors in
Intel64 And IA-32 Processor Architectures Software Developer's Manual
Volume 3 Revision 058.

	* sysdeps/x86/cpu-features.c (init_cpu_features): Detect Intel
	Goldmont and Airmont processors.
---
 sysdeps/x86/cpu-features.c | 8 ++++++++
 1 file changed, 8 insertions(+)
diff mbox

Patch

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 963b845..a5fa81f 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -140,6 +140,14 @@  init_cpu_features (struct cpu_features *cpu_features)
 	      cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
 		|= bit_arch_Prefer_No_VZEROUPPER;
 
+	    case 0x5c:
+	    case 0x5f:
+	      /* Unaligned load versions are faster than SSSE3
+		 on Goldmont.  */
+
+	    case 0x4c:
+	      /* Airmont is a die shrink of Silvermont.  */
+
 	    case 0x37:
 	    case 0x4a:
 	    case 0x4d: