From patchwork Wed Oct 11 11:53:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddhesh Poyarekar X-Patchwork-Id: 23474 Received: (qmail 56741 invoked by alias); 11 Oct 2017 11:53:58 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 56650 invoked by uid 89); 11 Oct 2017 11:53:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_NEUTRAL autolearn=ham version=3.3.2 spammy=H*MI:9648 X-HELO: homiemail-a120.g.dreamhost.com From: Siddhesh Poyarekar To: libc-alpha@sourceware.org Subject: [PATCH 1/2] Document cache information sysconf variables Date: Wed, 11 Oct 2017 17:23:43 +0530 Message-Id: <1507722824-9648-1-git-send-email-siddhesh@sourceware.org> Write short one line descriptions for each of the cache information sysconf variables. * manual/conf.texi (_SC_LEVEL1_ICACHE_SIZE, _SC_LEVEL1_ICACHE_ASSOC, _SC_LEVEL1_ICACHE_LINESIZE, _SC_LEVEL1_DCACHE_SIZE, _SC_LEVEL1_DCACHE_ASSOC, _SC_LEVEL1_DCACHE_LINESIZE, _SC_LEVEL2_CACHE_SIZE, _SC_LEVEL2_CACHE_ASSOC, _SC_LEVEL2_CACHE_LINESIZE, _SC_LEVEL3_CACHE_SIZE, _SC_LEVEL3_CACHE_ASSOC, _SC_LEVEL3_CACHE_LINESIZE, _SC_LEVEL4_CACHE_SIZE, _SC_LEVEL4_CACHE_ASSOC, _SC_LEVEL4_CACHE_LINESIZE): New variables. --- manual/conf.texi | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/manual/conf.texi b/manual/conf.texi index 875862c..503b240 100644 --- a/manual/conf.texi +++ b/manual/conf.texi @@ -678,6 +678,67 @@ Inquire about the number of available physical pages in the system. Inquire about the number of functions which can be registered as termination functions for @code{atexit}; @pxref{Cleanups on Exit}. +@item _SC_LEVEL1_ICACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 1 instruction cache. + +@item _SC_LEVEL1_ICACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about associativity of the Level 1 instruction cache. + +@item _SC_LEVEL1_ICACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 1 instruction cache. + +@item _SC_LEVEL1_DCACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 1 data cache. + +@item _SC_LEVEL1_DCACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about associativity of the Level 1 data cache. + +@item _SC_LEVEL1_DCACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 1 data cache. + +@item _SC_LEVEL2_CACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 2 cache. + +@item _SC_LEVEL2_CACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about associativity of the Level 2 cache. + +@item _SC_LEVEL2_CACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 2 cache. + +@item _SC_LEVEL3_CACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 3 cache. + +@item _SC_LEVEL3_CACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about associativity of the Level 3 cache. + +@item _SC_LEVEL3_CACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 3 cache. + +@item _SC_LEVEL4_CACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 4 cache. + +@item _SC_LEVEL4_CACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about associativity of the Level 4 cache. + +@item _SC_LEVEL4_CACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 4 cache. + + @item _SC_XOPEN_VERSION @standards{X/Open, unistd.h} Inquire about the parameter corresponding to @code{_XOPEN_VERSION}.