From patchwork Fri Jun 17 23:54:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yury Norov X-Patchwork-Id: 13192 Received: (qmail 90212 invoked by alias); 17 Jun 2016 23:55:14 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 90118 invoked by uid 89); 17 Jun 2016 23:55:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.1 required=5.0 tests=AWL, BAYES_50, KAM_MANYTO, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS autolearn=no version=3.3.2 spammy=1217, menu, sk:philipp, H*r:sk:mail-bn X-HELO: na01-bn1-obe.outbound.protection.outlook.com Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Yuri.Norov@caviumnetworks.com; From: Yury Norov To: , , , , , , CC: , , , , , , , , , , , , , , , , , , , , Andrew Pinski , Andrew Pinski , Bamvor Jian Zhang Subject: [PATCH 05/19] arm64: rename COMPAT to AARCH32_EL0 in Kconfig Date: Sat, 18 Jun 2016 02:54:14 +0300 Message-ID: <1466207668-10549-6-git-send-email-ynorov@caviumnetworks.com> In-Reply-To: <1466207668-10549-1-git-send-email-ynorov@caviumnetworks.com> References: <1466207668-10549-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 X-ClientProxiedBy: CY1PR04CA0027.namprd04.prod.outlook.com (10.166.187.37) To DM3PR07MB2252.namprd07.prod.outlook.com (10.164.33.150) X-MS-Office365-Filtering-Correlation-Id: 4839d34c-d8b2-4744-9646-08d3970aca32 X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2252; 2:5Oy7unogLi56saTrXUs91vtWF+sjyntPbwYhSepMuxlhNs4nU80vW0XchIiE5bQxGrvm2rwlcnO4OvarrulJTziCN5Dgkc9xvBPIx88njFkOO1Y2HoPJwnDfPybHsb4JMyt3+9bkUYt2tPdPrMyVX5oekyhmIgq2PLlWcA43xJQyPprRzi5sFo4nGTJIWoVm; 3:n9Ki3eLS55a8WD7ZWPZoqrUHvJjOQAnw++sGYGbPW7GsGq4QrOLL7B6zRjKsIbt8VPtlUyEmjaf5P106gqvN7T4dYKzNXBtx25BbvB70XRuCLH5pPXxW2Bn13yXu5Lad; 25:GNDTQCEz7ZDZf8uBLIHH28atIaDsclkotNnYbrhkYPdDiaLzHpezwUhNXGqnv/rSLFjRTXXLbVOmmGsbd1Vb/8xwXjZrTs/YK90PcjyDxvVYLlg8fuYocRKxg5Ledm3kSeMnplPr+wnrHRA7PHuPeJo0bslkP+802hCyi/HW9aRfpkmgoUBNBCbP9ZzJ2q5M42C477MoNk/BNz52VBUdIaWyYczfzYWWJrjqvItyQ8MgViB2W77GpcK2UiXK0EthBh+j1s2k1RyZsYK+OMCeheZS7do3PnBd8q17yrZgFjjimcvbjXmVp+75xlS0xBpfGL/X+0TvgsdEWzTdBGc4aQ5uYNL5OnBT+h7+xs31vvPhWSxTcDA1a83O2J5CgOzqpRagvQI+ApbkgG5m2IJKb3tkbR9hUqeIB3zCnAEFDUo= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:DM3PR07MB2252; X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2252; 20:dUWke7Cw//KsNpp2XrUHhq2XtW4zoJjj8m3zHWrtP/OcDgyve8aclWpsQhhi/PGuN/Ca/WmJ7wLKeAwqXzQ6IfDLmwreT0A9/VI7i8aeWY/VKiZciGZTvtHDGuuh05VRuYZaK+ijgmDbAw5qnMykeUyJOESCO+rKe7S45jNMBoT5YXQZwV8vWSr8/TFhy+kFHvXngM4Yx7UBDwjrc9PmFpkTnLTH9FChdsO31mivOoeu1gwaS1Df+bJViDr/kpLHfcupc2/1QBxELQu/fiRscO5lIwzVHg5kx64BSawgw0WisTuz47FG/6vGnuY3brsvbav7NumQZZ/1opSHwdDF1ZVqNox1YxgYrttOP98ShRd2DWcKd8NwJC7Wbhj2YhEIfbHIPe0UmA8q0KhJX8eCDhJZPwA8/1JOH24nPIuU4C8RFwgmefboXhtoTekR1/aSaiQ5zu3yGi69Y3RIU6jNO30e76pdXut7L4oRsQT2FfGyB3937oBV9EC4Mh/l3uFygg1i1giIHYrWIZag7qgOGUwuXEmEswGV4bd7gBU7OyADcEzM4kQwpffaTcEbyHG6vYb4SidBIlILzDFiM4dIdAEVzf9ngWVldgUEtamQ/mg= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(250305191791016)(22074186197030); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(5005006)(8121501046)(3002001)(10201501046); SRVR:DM3PR07MB2252; BCL:0; PCL:0; RULEID:; SRVR:DM3PR07MB2252; X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2252; 4:TSCLia2zVaXV1gXzy5l4258XzxuraG3dgHmPQtrjdjOU193VfJVyt6oai81AzpQUv3Fjfi/S6XHkT7hAE9cF93ezB9Qcl/QabnK1ZB/Bdz3IQOH2ED3LM1YZO3glx8XbAPg8PQY+2UyW8p88D+0k9QT9zMEmedlEBTP1+wWjIiTr3v+XFtl6kzyUF1X70McJ6rJzFTVf+LvFbtNumgFXksZDLCGtBdV16jKJXAM4RFeADK00ptM4ZiZlZkKX5a/+DYfyrrC7GM1mrNNINwGXfjZ8pYGdziW7Kr9npLRjpKJZQj4p26B0n78lH91CVhbgHDBFPDV13u02Qq3HSYdfnqWHHAwOTEzNSm71cr26WgRIWTDsAzNOEZdOo1F9xVzuZZwWB7vlj5pITeV+yRFyNOuSugMC7lI+gknJ9IJt4cdTbJMcTa9KYnioslMdfAMZrAV0FcCNOcev/hS6W92e0A== X-Forefront-PRVS: 09760A0505 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(4630300001)(6009001)(6069001)(7916002)(199003)(189002)(3846002)(189998001)(6116002)(42186005)(5003940100001)(106356001)(5001770100001)(586003)(36756003)(19580405001)(575784001)(2906002)(19580395003)(7846002)(101416001)(4326007)(50226002)(5004730100002)(105586002)(8676002)(92566002)(2950100001)(48376002)(76176999)(229853001)(81166006)(2201001)(76506005)(50466002)(68736007)(81156014)(97736004)(33646002)(15975445007)(47776003)(66066001)(50986999)(77096005)(2101003); DIR:OUT; SFP:1101; SCL:1; SRVR:DM3PR07MB2252; H:localhost; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; Received-SPF: None (protection.outlook.com: caviumnetworks.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; DM3PR07MB2252; 23:RhhhtZ6mORHNWQW8IIW+klyZcoqKvwFj/cHrr5FE5?= =?us-ascii?Q?qyABOFRvu2Dlcx0xKUU5Zu93cTFCxfi+DTTc6zUDgfqcUEBQjYc4LtYDXqQS?= =?us-ascii?Q?wN4laCYbJz2GMuSCMIeo/Zp2S5IelJTh8k3umwaPtL/AGCZHP1SNJ/HJJMH3?= =?us-ascii?Q?s5tkl0t9K+yLSS3TycE80iyQ7mgdhk1V11g+cGIf3heToYrZVK7AhHUcuOzk?= =?us-ascii?Q?tVJZ+w/6zPY8EoEoxfLkkR+o+Qivz3h+w9t/WdGgFUXHxH8CoV9K2eUlIcd0?= =?us-ascii?Q?AEheQoMFfJQpjOWqnxq4TqCMC358DOu32IjBmH2NtuY13miFEBVjlYDmXvqI?= =?us-ascii?Q?xEeM5nF38sgUjj49KlsW9HvNquU6LCojMQtfweSE+012LZ4laZGTEJyPvnsx?= =?us-ascii?Q?rOcJh4e9+NKjIBUkshZWcPjB6Y0Oz9CzR5naBYH4DY8wjmTXSZ9pXGHVdpM6?= =?us-ascii?Q?TvpfbTNO8pABQmEbDgF5jdUTbZBgfduAg9UyKUc5i/ITpdX4JQeSeTdRZBjx?= =?us-ascii?Q?MhPQwjEsUpDpfrfbMeRy7mbzBRi6ehSUNHyyPu9uRI/zavm6OUZr93j2pfwG?= =?us-ascii?Q?9mx4Ck0/CaFfuw7TUiHnK2Z+58dPszHFcQNT1hjchZjpGfRA52Bfk4aroxaz?= =?us-ascii?Q?gK5/FeROYqGAj4ra8JKIZeaX1kQIzw48s8eVhoAJzXW99YOGCiPuegvNm0IH?= =?us-ascii?Q?OfYO2d1vso5Qotl3uDtU/MjTGI+YhTVhBPsk83etmLvHoUpPRhuEyUReu2Bw?= =?us-ascii?Q?b2ZrihdVK78WKtR+ejfPB1XgwlqGXWATBbUPHQqqxtKQZRBPrp0pyJGt01J1?= =?us-ascii?Q?fO+yVAYyenkQJ0XdxN6z7uoOQhzSjV0XhkYDLfKVxYfA/9wvWet19mp926DI?= =?us-ascii?Q?DfPMGHDesGSgyp5Huyk3bh0aLLICWOOtfk5aOvduN7dynlfJf6v49sBieSo8?= =?us-ascii?Q?fHdd7lrfso90zZQeFaw8GRQ8ZYdI9Mwi54AEF2RWpW1F+HSAiLJP6qaw5cVC?= =?us-ascii?Q?ATjkPsuShj3PbUf/5/sOhOZCXHkAA3y9eIO9C6o4PjjMeB4sUqXtRmBkrmg4?= =?us-ascii?Q?XdMVVokq145UBhpjUFvaudSv1nCut7LzPJ3HC4v/Hveb87OyWfk8EbmbXB/g?= =?us-ascii?Q?KH/UFd3uYsSLHk2kGfsSYeLh0Dzkv10P/0wn1OBe9nhpXWIo7fb+w=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2252; 6:val331NqsiK9UM3AWvn+4qeGAZ6BF1j7LU0L99R+LYBhbHy6nv9RHT1iV7PGJEA62fPNz00mpzwtzVKJ8uz1P/gllCWtainfaPr1XnfUFCmbQwgNkP4bvhsTgdgYkLEvA1XPKMHPUx1xzj+60i8KSKMFvOmnCTDAwSLY5P42XqZTWEL8+UGo3SYqgtC/9tsSyvxDggaD8G+iO2B6wqXIE9J/uRnSHSGVbbb7241wvVUJ6STEyPdMz7m2Y6kZuACwagWVl7OkXguwg/joHF0UNxeNeyHeI5XXfun7JD5MLEQ=; 5:8fa+NbSMFwcn2hI5hI9rfVjmp/MDRI1/vMRYxWxx2IxfqMiNkWcdC4Nh2195arGpRLHIcUq7C8wR6ubXgnc7pPZtsefJyXhsDitoq+PO1TJoKCWQpJONiMLxhZtsua1DEplfJgIf6EZpjLGN90FNdw==; 24:1n2TmFHn1+kyn4O0FvGblPPI1+p6Ma8FpSfsPSeO6mI8inZjitu4sI2gj24STB3ec0ZtWFzAITNr1XifV8s/aW7xST0RCox7dpNDXZxUki4=; 7:riXQtEQvr7PfTOxM+XUfzfLmFOrjcbiWKUxFL73+AXPxNOnxYy+zu0mkFPDYoowFEk5tKUvc9QhYjDxgwhf84lsF3RlJPIfYozghO71l06WE0+5Z4VTd7AVuELJxs580EsYfZCzzl9+w8Dd5MwVLD9PkDPr3NkY+5mCcB6SXVaelSsASP6e8+QX+BeOQUYEHSiHG5AL4scvnoR9HW2esbEldCqCDkfHqLlMVZTK6aaxC1EMBDGs3AOe5i3F/ZCPL SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2016 23:54:58.5320 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR07MB2252 From: Andrew Pinski In this patchset ILP32 ABI support is added. Additionally to AARCH32, which is binary-compatible with ARM, ILP32 is (mostly) ABI-compatible. From now, AARCH32_EL0 (former COMPAT) config option means the support of AARCH32 userspace, ARM64_ILP32 - support of ILP32 ABI (see next patches), and COMPAT indicates that one of them, or both, is enabled. Where needed, CONFIG_COMPAT is changed over to use CONFIG_AARCH32_EL0 instead Reviewed-by: David Daney Signed-off-by: Andrew Pinski Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Bamvor Jian Zhang Signed-off-by: Yury Norov --- arch/arm64/Kconfig | 10 ++++++++-- arch/arm64/include/asm/fpsimd.h | 2 +- arch/arm64/include/asm/hwcap.h | 4 ++-- arch/arm64/include/asm/processor.h | 6 +++--- arch/arm64/include/asm/ptrace.h | 2 +- arch/arm64/include/asm/signal32.h | 6 ++++-- arch/arm64/include/asm/unistd.h | 2 +- arch/arm64/kernel/Makefile | 2 +- arch/arm64/kernel/asm-offsets.c | 2 +- arch/arm64/kernel/cpufeature.c | 8 ++++---- arch/arm64/kernel/cpuinfo.c | 20 +++++++++++--------- arch/arm64/kernel/entry.S | 6 +++--- arch/arm64/kernel/head.S | 2 +- arch/arm64/kernel/ptrace.c | 8 ++++---- arch/arm64/kernel/traps.c | 2 +- arch/arm64/kernel/vdso.c | 4 ++-- drivers/clocksource/arm_arch_timer.c | 2 +- 17 files changed, 49 insertions(+), 39 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5a0a691..aea8e61 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -385,7 +385,7 @@ config ARM64_ERRATUM_834220 config ARM64_ERRATUM_845719 bool "Cortex-A53: 845719: a load might read incorrect data" - depends on COMPAT + depends on AARCH32_EL0 default y help This option adds an alternative code sequence to work around ARM @@ -701,7 +701,7 @@ config FORCE_MAX_ZONEORDER menuconfig ARMV8_DEPRECATED bool "Emulate deprecated/obsolete ARMv8 instructions" - depends on COMPAT + depends on AARCH32_EL0 help Legacy software support may require certain instructions that have been deprecated or obsoleted in the architecture. @@ -971,8 +971,14 @@ menu "Userspace binary formats" source "fs/Kconfig.binfmt" config COMPAT + bool + depends on AARCH32_EL0 + +config AARCH32_EL0 bool "Kernel support for 32-bit EL0" + def_bool y depends on ARM64_4K_PAGES || EXPERT + select COMPAT select COMPAT_BINFMT_ELF select HAVE_UID16 select OLD_SIGSUSPEND3 diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index 50f559f..63b19f1 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -52,7 +52,7 @@ struct fpsimd_partial_state { }; -#if defined(__KERNEL__) && defined(CONFIG_COMPAT) +#if defined(__KERNEL__) && defined(CONFIG_AARCH32_EL0) /* Masks for extracting the FPSR and FPCR from the FPSCR */ #define VFP_FPSCR_STAT_MASK 0xf800009f #define VFP_FPSCR_CTRL_MASK 0x07f79f00 diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index 400b80b..2c7fc5d 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -46,7 +46,7 @@ */ #define ELF_HWCAP (elf_hwcap) -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define COMPAT_ELF_HWCAP (compat_elf_hwcap) #define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2) extern unsigned int compat_elf_hwcap, compat_elf_hwcap2; @@ -54,7 +54,7 @@ extern unsigned int compat_elf_hwcap, compat_elf_hwcap2; enum { CAP_HWCAP = 1, -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 CAP_COMPAT_HWCAP, CAP_COMPAT_HWCAP2, #endif diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index cef1cf3..5bbdbb4 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -81,7 +81,7 @@ struct cpu_context { struct thread_struct { struct cpu_context cpu_context; /* cpu context */ unsigned long tp_value; /* TLS register */ -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 unsigned long tp2_value; #endif struct fpsimd_state fpsimd_state; @@ -90,7 +90,7 @@ struct thread_struct { struct debug_info debug; /* debugging */ }; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define task_user_tls(t) \ ({ \ unsigned long *__tls; \ @@ -121,7 +121,7 @@ static inline void start_thread(struct pt_regs *regs, unsigned long pc, regs->sp = sp; } -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) { diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h index a307eb6..4c730c3 100644 --- a/arch/arm64/include/asm/ptrace.h +++ b/arch/arm64/include/asm/ptrace.h @@ -121,7 +121,7 @@ struct pt_regs { #define arch_has_single_step() (1) -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define compat_thumb_mode(regs) \ (((regs)->pstate & COMPAT_PSR_T_BIT)) #else diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h index eeaa975..e68fcce 100644 --- a/arch/arm64/include/asm/signal32.h +++ b/arch/arm64/include/asm/signal32.h @@ -17,7 +17,9 @@ #define __ASM_SIGNAL32_H #ifdef __KERNEL__ -#ifdef CONFIG_COMPAT + +#ifdef CONFIG_AARCH32_EL0 + #include #define AARCH32_KERN_SIGRET_CODE_OFFSET 0x500 @@ -47,6 +49,6 @@ static inline int compat_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t static inline void compat_setup_restart_syscall(struct pt_regs *regs) { } -#endif /* CONFIG_COMPAT */ +#endif /* CONFIG_AARCH32_EL0 */ #endif /* __KERNEL__ */ #endif /* __ASM_SIGNAL32_H */ diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h index e78ac26..fe9d6c1 100644 --- a/arch/arm64/include/asm/unistd.h +++ b/arch/arm64/include/asm/unistd.h @@ -13,7 +13,7 @@ * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define __ARCH_WANT_COMPAT_SYS_GETDENTS64 #define __ARCH_WANT_COMPAT_STAT64 #define __ARCH_WANT_SYS_GETHOSTNAME diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index 2173149..631a118 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -25,7 +25,7 @@ OBJCOPYFLAGS := --prefix-symbols=__efistub_ $(obj)/%.stub.o: $(obj)/%.o FORCE $(call if_changed,objcopy) -arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \ +arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \ sys_compat.o entry32.o \ ../../arm/kernel/opcodes.o arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c index f8e5d47..06090db 100644 --- a/arch/arm64/kernel/asm-offsets.c +++ b/arch/arm64/kernel/asm-offsets.c @@ -53,7 +53,7 @@ int main(void) DEFINE(S_X7, offsetof(struct pt_regs, regs[7])); DEFINE(S_LR, offsetof(struct pt_regs, regs[30])); DEFINE(S_SP, offsetof(struct pt_regs, sp)); -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp)); #endif DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate)); diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 811773d..9f2fd84 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -32,7 +32,7 @@ unsigned long elf_hwcap __read_mostly; EXPORT_SYMBOL_GPL(elf_hwcap); -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #define COMPAT_ELF_HWCAP_DEFAULT \ (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\ COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\ @@ -834,7 +834,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { }; static const struct arm64_cpu_capabilities compat_elf_hwcaps[] = { -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_SHA1_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA1), @@ -850,7 +850,7 @@ static void __init cap_set_elf_hwcap(const struct arm64_cpu_capabilities *cap) case CAP_HWCAP: elf_hwcap |= cap->hwcap; break; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 case CAP_COMPAT_HWCAP: compat_elf_hwcap |= (u32)cap->hwcap; break; @@ -873,7 +873,7 @@ static bool cpus_have_elf_hwcap(const struct arm64_cpu_capabilities *cap) case CAP_HWCAP: rc = (elf_hwcap & cap->hwcap) != 0; break; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 case CAP_COMPAT_HWCAP: rc = (compat_elf_hwcap & (u32)cap->hwcap) != 0; break; diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index c173d32..af200a8 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -134,15 +134,17 @@ static int c_show(struct seq_file *m, void *v) */ seq_puts(m, "Features\t:"); if (compat) { -#ifdef CONFIG_COMPAT - for (j = 0; compat_hwcap_str[j]; j++) - if (compat_elf_hwcap & (1 << j)) - seq_printf(m, " %s", compat_hwcap_str[j]); - - for (j = 0; compat_hwcap2_str[j]; j++) - if (compat_elf_hwcap2 & (1 << j)) - seq_printf(m, " %s", compat_hwcap2_str[j]); -#endif /* CONFIG_COMPAT */ +#ifdef CONFIG_AARCH32_EL0 + if (personality(current->personality) == PER_LINUX32) { + for (j = 0; compat_hwcap_str[j]; j++) + if (compat_elf_hwcap & (1 << j)) + seq_printf(m, " %s", compat_hwcap_str[j]); + + for (j = 0; compat_hwcap2_str[j]; j++) + if (compat_elf_hwcap2 & (1 << j)) + seq_printf(m, " %s", compat_hwcap2_str[j]); + } +#endif /* CONFIG_AARCH32_EL0 */ } else { for (j = 0; hwcap_str[j]; j++) if (elf_hwcap & (1 << j)) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index ec8bb48..21a0624 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -260,7 +260,7 @@ ENTRY(vectors) ventry el0_fiq_invalid // FIQ 64-bit EL0 ventry el0_error_invalid // Error 64-bit EL0 -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 ventry el0_sync_compat // Synchronous 32-bit EL0 ventry el0_irq_compat // IRQ 32-bit EL0 ventry el0_fiq_invalid_compat // FIQ 32-bit EL0 @@ -300,7 +300,7 @@ el0_error_invalid: inv_entry 0, BAD_ERROR ENDPROC(el0_error_invalid) -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 el0_fiq_invalid_compat: inv_entry 0, BAD_FIQ, 32 ENDPROC(el0_fiq_invalid_compat) @@ -463,7 +463,7 @@ el0_sync: b.ge el0_dbg b el0_inv -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 .align 6 el0_sync_compat: kernel_entry 0, 32 diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 2c6e598..4d16787 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -567,7 +567,7 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems msr cptr_el2, x0 // Disable copro. traps to EL2 1: -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 msr hstr_el2, xzr // Disable CP15 traps to EL2 #endif diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 3f6cd5c..aa79e81 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -82,7 +82,7 @@ static void ptrace_hbptriggered(struct perf_event *bp, .si_addr = (void __user *)(bkpt->trigger), }; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 int i; if (!is_compat_task()) @@ -657,7 +657,7 @@ static const struct user_regset_view user_aarch64_view = { .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets) }; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 #include enum compat_regset { @@ -1192,11 +1192,11 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, return ret; } -#endif /* CONFIG_COMPAT */ +#endif /* CONFIG_AARCH32_EL0 */ const struct user_regset_view *task_user_regset_view(struct task_struct *task) { -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 /* * Core dumping of 32-bit tasks or compat ptrace requests must use the * user_aarch32_view compatible with arm32. Native ptrace requests on diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index ab066d1..973faec 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -409,7 +409,7 @@ long compat_arm_syscall(struct pt_regs *regs); asmlinkage long do_ni_syscall(struct pt_regs *regs) { -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 long ret; if (is_compat_task()) { ret = compat_arm_syscall(regs); diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c index 9fefb00..2a0de6f 100644 --- a/arch/arm64/kernel/vdso.c +++ b/arch/arm64/kernel/vdso.c @@ -49,7 +49,7 @@ static union { } vdso_data_store __page_aligned_data; struct vdso_data *vdso_data = &vdso_data_store.data; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 /* * Create and map the vectors page for AArch32 tasks. */ @@ -108,7 +108,7 @@ int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp) return PTR_ERR_OR_ZERO(ret); } -#endif /* CONFIG_COMPAT */ +#endif /* CONFIG_AARCH32_EL0 */ static struct vm_special_mapping vdso_spec[2]; diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 4814446..bc5f13d 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -321,7 +321,7 @@ static void arch_timer_evtstrm_enable(int divider) | ARCH_TIMER_VIRT_EVT_EN; arch_timer_set_cntkctl(cntkctl); elf_hwcap |= HWCAP_EVTSTRM; -#ifdef CONFIG_COMPAT +#ifdef CONFIG_AARCH32_EL0 compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM; #endif }