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[RFC,1/3] ARM64: ILP32: change register x1 to PTR_REG

Message ID 1426674611-26427-2-git-send-email-bamvor.zhangjian@huawei.com
State New
Headers show

Commit Message

Zhang Jian(Bamvor) March 18, 2015, 10:30 a.m. UTC
From: Yang Yingliang <yangyingliang@huawei.com>

It should use 32-bit register if librt is used by an
ILP32 application on ARM64.
It could fix mq_timedreceive and mq_timedsend relative testcases
in LTP testsuite.

Suggested-by: Andrew Pinski <apinski@cavium.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
 sysdeps/unix/sysv/linux/aarch64/sysdep.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/sysdeps/unix/sysv/linux/aarch64/sysdep.h b/sysdeps/unix/sysv/linux/aarch64/sysdep.h
index 3369adb..49ac63e 100644
--- a/sysdeps/unix/sysv/linux/aarch64/sysdep.h
+++ b/sysdeps/unix/sysv/linux/aarch64/sysdep.h
@@ -108,7 +108,7 @@ 
 .Lsyscall_error:						\
 	adrp	x1, :gottprel:errno;				\
 	neg	w2, w0;						\
-	ldr	x1, [x1, :gottprel_lo12:errno];			\
+	ldr	PTR_REG(1), [x1, :gottprel_lo12:errno];		\
 	mrs	x3, tpidr_el0;					\
 	mov	x0, -1;						\
 	str	w2, [x1, x3];					\