From patchwork Fri May 23 15:07:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wilco Dijkstra X-Patchwork-Id: 1096 Return-Path: X-Original-To: siddhesh@wilcox.dreamhost.com Delivered-To: siddhesh@wilcox.dreamhost.com Received: from homiemail-mx20.g.dreamhost.com (mx2.sub5.homie.mail.dreamhost.com [208.113.200.128]) by wilcox.dreamhost.com (Postfix) with ESMTP id 22EFF360073 for ; Fri, 23 May 2014 08:07:41 -0700 (PDT) Received: by homiemail-mx20.g.dreamhost.com (Postfix, from userid 14307373) id C899B41C2643D; Fri, 23 May 2014 08:07:40 -0700 (PDT) X-Original-To: glibc@patchwork.siddhesh.in Delivered-To: x14307373@homiemail-mx20.g.dreamhost.com Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by homiemail-mx20.g.dreamhost.com (Postfix) with ESMTPS id 8FA1041C2435B for ; Fri, 23 May 2014 08:07:40 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:mime-version :content-type; q=dns; s=default; b=yLitWBsNt8bcK8PZhtRMtBXtYY7fg PePLQ+v6QPNz0sZ6I95oaQQdZJ3zHAbS6wAm5XilYW0Wl4Z80mUaAR3vbVLlTmC5 HMF/4ZM5CJ0B9s5/rhsCaQoeGMlBTB4dhyxhlo2GBfyeGv1BZ8S0DNQnQeNkjnBf tKninq75Ep87qM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:mime-version :content-type; s=default; bh=VClv3AcdFQaRIwGzdLY6tHyTCuo=; b=xBz 4Al/3p9VdRkp1CTaqN/zX06ZTVrYUV6+B8Qf/IKjz7reRzQzdHddWEJBdWmTam3i nhgVvwwPKj1BRxME4huKF5ossGLpwo30l9lI+rBMCHGAdcx5LWGmwl2gmPf9FpUP JEE+QrF99Pjqkv+lL86igedlFEAXPHETF773iOCg= Received: (qmail 3257 invoked by alias); 23 May 2014 15:07:38 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 3247 invoked by uid 89); 23 May 2014 15:07:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.3 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS, UNSUBSCRIBE_BODY autolearn=no version=3.3.2 X-HELO: service87.mimecast.com From: "Wilco" To: Subject: [PATCH] Aarch64 - Rewrite feupdateenv Date: Fri, 23 May 2014 16:07:25 +0100 Message-ID: <000501cf7698$b53ffd50$1fbff7f0$@com> MIME-Version: 1.0 X-MC-Unique: 114052316073300501 X-DH-Original-To: glibc@patchwork.siddhesh.in Hi, This patch rewrites feupdateenv to improve performance by avoiding unnecessary FPSCR reads/writes and to fix bug 16918 (https://sourceware.org/bugzilla/show_bug.cgi?id=16918). OK? Wilco ChangeLog: 2014-05-23 Wilco * sysdeps/aarch64/fpu/feupdateenv (feupdateenv): Rewrite to reduce FPCR/FPSR accesses and fix bug 16918. --- sysdeps/aarch64/fpu/feupdateenv.c | 59 +++++++++++++++++++++++++++++++++++---- 1 file changed, 54 insertions(+), 5 deletions(-) diff --git a/sysdeps/aarch64/fpu/feupdateenv.c b/sysdeps/aarch64/fpu/feupdateenv.c index 6d64a9b..ac2f6fe 100644 --- a/sysdeps/aarch64/fpu/feupdateenv.c +++ b/sysdeps/aarch64/fpu/feupdateenv.c @@ -22,16 +22,65 @@ int feupdateenv (const fenv_t *envp) { + fpu_control_t fpcr; + fpu_control_t fpcr_new; + fpu_control_t updated_fpcr; fpu_fpsr_t fpsr; + fpu_fpsr_t fpsr_new; + int excepts; - /* Get the current exception state. */ + _FPU_GETCW (fpcr); _FPU_GETFPSR (fpsr); + excepts = fpsr & FE_ALL_EXCEPT; - /* Install new environment. */ - fesetenv (envp); + if ((envp != FE_DFL_ENV) && (envp != FE_NOMASK_ENV)) + { + fpcr_new = envp->__fpcr; + fpsr_new = envp->__fpsr | excepts; - /* Raise the saved exceptions. */ - feraiseexcept (fpsr & FE_ALL_EXCEPT); + if (fpcr != fpcr_new) + _FPU_SETCW (fpcr_new); + + if (fpsr != fpsr_new) + _FPU_SETFPSR (fpsr_new); + + if (excepts & (fpcr_new >> FE_EXCEPT_SHIFT)) + return feraiseexcept (excepts); + + return 0; + } + + fpcr_new = fpcr & _FPU_RESERVED; + fpsr_new = fpsr & (_FPU_FPSR_RESERVED | FE_ALL_EXCEPT); + + if (envp == FE_DFL_ENV) + { + fpcr_new |= _FPU_DEFAULT; + fpsr_new |= _FPU_FPSR_DEFAULT; + } + else + { + fpcr_new |= _FPU_FPCR_IEEE; + fpsr_new |= _FPU_FPSR_IEEE; + } + + _FPU_SETFPSR (fpsr_new); + + if (fpcr != fpcr_new) + { + _FPU_SETCW (fpcr_new); + + /* Trapping exceptions are optional in AArch64; the relevant enable + bits in FPCR are RES0 hence the absence of support can be detected + by reading back the FPCR and comparing with the required value. */ + _FPU_GETCW (updated_fpcr); + + if (fpcr_new & ~updated_fpcr) + return 1; + } + + if (excepts & (fpcr_new >> FE_EXCEPT_SHIFT)) + return feraiseexcept (excepts); return 0; }