From patchwork Mon Nov 15 21:06:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 47721 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DA971385843A for ; Mon, 15 Nov 2021 21:07:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DA971385843A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1637010439; bh=caWniLBWSbiu6FBERzjZR9tRpzmsr2QfVa5fXDNEheA=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=stZ9ZfpxmTYir3UclGK0sU7j6Y6i2VZ6JdxhybwDRWeHLNUF3MCwZ+uFONG6jDJlR 0OjF16iRCH7RIQ71jkKTqgFxhHF56bjGriWUFjTFmy+LAAiE+oOqtH17czsgBBFQpv f5q6FmWCBFLPMZGQzoqGAP3KXtgGuyE6g5UCQwps= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id 1141A3858405 for ; Mon, 15 Nov 2021 21:06:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1141A3858405 X-IronPort-AV: E=McAfee;i="6200,9189,10169"; a="230992553" X-IronPort-AV: E=Sophos;i="5.87,237,1631602800"; d="scan'208";a="230992553" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2021 13:06:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,237,1631602800"; d="scan'208";a="472062258" Received: from scymds02.sc.intel.com ([10.82.73.244]) by orsmga002.jf.intel.com with ESMTP; 15 Nov 2021 13:06:56 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds02.sc.intel.com with ESMTP id 1AFL6u1k004393; Mon, 15 Nov 2021 13:06:56 -0800 To: libc-alpha@sourceware.org Subject: [PATCH v3 0/6] Implement microbenchmark for libmvec Date: Mon, 15 Nov 2021 13:06:50 -0800 Message-Id: <20211115210656.1861223-1-skpgkp2@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" Implement microbenchmark for vector cos, cosf, exp, expf, log, logf, pow, powf, sin and sinf functions in libmvec with a python script to generate microbenchmark programs from the input values for each function using a skeleton benchmark template. Purpose of the libmvec microbenchmark test is to evaluate work path performance reliably, not to cover as much input range as possible. Sunil K Pandey (6): x86-64: Create microbenchmark infrastructure for libmvec x86-64: Add vector cos/cosf to libmvec microbenchmark x86-64: Add vector exp/expf to libmvec microbenchmark x86-64: Add vector log/logf to libmvec microbenchmark x86-64: Add vector pow/powf to libmvec microbenchmark x86-64: Add vector sin/sinf to libmvec microbenchmark sysdeps/x86_64/fpu/Makeconfig | 40 + sysdeps/x86_64/fpu/Makefile | 40 + sysdeps/x86_64/fpu/bench-libmvec-skeleton.c | 104 + sysdeps/x86_64/fpu/libmvec-cos-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-cosf-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-exp-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-expf-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-logf-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-pow-inputs | 4106 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-powf-inputs | 4106 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sin-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sinf-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/scripts/bench_libmvec.py | 464 +++ 14 files changed, 41660 insertions(+) create mode 100644 sysdeps/x86_64/fpu/bench-libmvec-skeleton.c create mode 100644 sysdeps/x86_64/fpu/libmvec-cos-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-cosf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-exp-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-expf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-logf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-pow-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-powf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sin-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sinf-inputs create mode 100755 sysdeps/x86_64/fpu/scripts/bench_libmvec.py