From patchwork Mon Nov 23 15:42:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Earnshaw X-Patchwork-Id: 41152 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CF3F53870868; Mon, 23 Nov 2020 15:42:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CF3F53870868 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1606146179; bh=fZAyAMlycfAagrl3XDl6hfh+UsfmpmZSv/x2xQOWbVw=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=LraAtxRwzpe89U8/FhHwvAIjstgxsDDu1qitb8oMYAuNiNU2bmJBRoh83xiNmEbXZ nAvpUKos+zHID1xAmbWEQXpIP6Tf+wO7PCCMKSd5aGIFZYkgSY+86xud+4mB+MUwgY v+W2onQ9FmgmD15G5zD24tbmsDzw3N+iHpfpbAPk= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 59D063842415 for ; Mon, 23 Nov 2020 15:42:53 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 59D063842415 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DC1AD1396; Mon, 23 Nov 2020 07:42:52 -0800 (PST) Received: from eagle.buzzard.freeserve.co.uk (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2FF3D3F718; Mon, 23 Nov 2020 07:42:52 -0800 (PST) To: libc-alpha@sourceware.org Subject: [PATCH v3 0/8] Memory tagging support Date: Mon, 23 Nov 2020 15:42:28 +0000 Message-Id: <20201123154236.25809-1-rearnsha@arm.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Earnshaw via Libc-alpha From: Richard Earnshaw Reply-To: Richard Earnshaw Cc: Richard Earnshaw Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" This is the third iteration of the patch set to enable memory tagging in glibc's malloc code. It mainly addresses the following issues raised during the previous review: - Clean up/add some internal API documentation - Remove ROUND_UP_ALLOCATION_SIZE and use some conditionalized code in checked_request2size instead. - Support MALLOC_CHECK_ in conjuction with _MTAG_ENABLE. The first two issues are addressed in patch 4 of this series, and the third in patch 5. I intend to merge patches 3, 4 and 5 into a single update to the malloc code before the final commit; I've kept them separate for now to (hopefully) simplify the review. The patches have all been rebased against master as of 2020/11/20. I spent quite a bit of time while working on these looking at whether the code could be refactored in order to reduce the places where SIZE_SZ was being added (in different multiples) to various pointers. I eventually concluded that this wasn't significantly improving the readability of the code, but one change has survived - I've replaced usage of 2 * SIZE_SZ with CHUNK_HDR_SZ when it is clear that this is referring to the header block at the start of a chunk. I've pushed a copy of this patch series to rearnsha/mte-v3.0, since I understand some people want to try the patch series as a whole. R. Richard Earnshaw (8): config: Allow memory tagging to be enabled when configuring glibc elf: Add a tunable to control use of tagged memory malloc: Basic support for memory tagging in the malloc() family malloc: Clean up commentary malloc: support MALLOC_CHECK_ in conjunction with _MTAG_ENABLE. linux: Add compatibility definitions to sys/prctl.h for MTE aarch64: Add sysv specific enabling code for memory tagging aarch64: Add aarch64-specific files for memory tagging support INSTALL | 14 + config.h.in | 3 + config.make.in | 2 + configure | 17 + configure.ac | 10 + elf/dl-tunables.list | 9 + malloc/arena.c | 59 ++- malloc/hooks.c | 79 ++-- malloc/malloc.c | 336 ++++++++++++++---- malloc/malloc.h | 7 + manual/install.texi | 13 + manual/tunables.texi | 31 ++ sysdeps/aarch64/Makefile | 5 + sysdeps/aarch64/__mtag_address_get_tag.S | 31 ++ sysdeps/aarch64/__mtag_memset_tag.S | 46 +++ sysdeps/aarch64/__mtag_new_tag.S | 38 ++ sysdeps/aarch64/__mtag_tag_region.S | 44 +++ sysdeps/aarch64/libc-mtag.h | 57 +++ sysdeps/generic/libc-mtag.h | 52 +++ sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h | 1 + sysdeps/unix/sysv/linux/aarch64/bits/mman.h | 7 + .../unix/sysv/linux/aarch64/cpu-features.c | 28 ++ .../unix/sysv/linux/aarch64/cpu-features.h | 1 + sysdeps/unix/sysv/linux/sys/prctl.h | 18 + 24 files changed, 811 insertions(+), 97 deletions(-) create mode 100644 sysdeps/aarch64/__mtag_address_get_tag.S create mode 100644 sysdeps/aarch64/__mtag_memset_tag.S create mode 100644 sysdeps/aarch64/__mtag_new_tag.S create mode 100644 sysdeps/aarch64/__mtag_tag_region.S create mode 100644 sysdeps/aarch64/libc-mtag.h create mode 100644 sysdeps/generic/libc-mtag.h