mbox series

[v3,0/3] x86: Add support for Zhaoxin processors

Message ID 1587731372-9324-1-git-send-email-mayshao-oc@zhaoxin.com
Headers show
Series x86: Add support for Zhaoxin processors | expand


Mayshao-oc April 24, 2020, 12:29 p.m. UTC
This patch series fix Shanghai Zhaoxin processor CPU Vendor ID detection
problem in glibc sysdep module.  Current glibc doesn't recognize Zhaoxin
CPU Vendor ID("CentaurHauls" and "Shanghai") and set kind to
arch_kind_other.  These lead to incorrect result of __cache_sysconf(),
incorrect value for variables like __x86_shared_cache_size, and fail
of test case tst-get-cpu-features.

 - code formatting fixups
 - Add a new function get_common_info() that extracts the code in
   init_cacheinfo() to get the value of shared, threads.

 - Remove the bit_arch_Prefer_MAP_32BIT_EXEC flag on the Zhaoxin processor
   with family==0x6.


This series was checked on x86_64-linux-gnu.

mayshao (3):
  x86: Add CPU Vendor ID detection support for Zhaoxin processors
  x86: Add cache information support for Zhaoxin processors
  x86: Add the test case of __get_cpu_features support for Zhaoxin

 sysdeps/x86/cacheinfo.c            | 477 ++++++++++++++++++++++---------------
 sysdeps/x86/cpu-features.c         |  54 +++++
 sysdeps/x86/cpu-features.h         |   1 +
 sysdeps/x86/tst-get-cpu-features.c |   2 +
 4 files changed, 338 insertions(+), 196 deletions(-)