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[v2,0/3] x86: Add support for Zhaoxin processors

Message ID 1585546430-6167-1-git-send-email-MayShao@zhaoxin.com
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Series x86: Add support for Zhaoxin processors | expand

Message

May Shao(BJ-RD) March 30, 2020, 5:33 a.m. UTC
This patch series fix Shanghai Zhaoxin processor CPU Vendor ID detection
problem in glibc sysdep module. Current glibc doesn't recognize Zhaoxin
CPU Vendor ID("CentaurHauls" and "Shanghai") and set kind to
arch_kind_other. These lead to incorrect result of __cache_sysconf(),
incorrect value for variables like __x86_shared_cache_size, and fail
of test case tst-get-cpu-features.

Previous version: https://sourceware.org/pipermail/libc-alpha/2019-December/109170.html
More disscussion: https://sourceware.org/pipermail/libc-alpha/2019-December/109227.html

Changes from previous version:
    - Remove the bit_arch_Prefer_MAP_32BIT_EXEC flag on the Zhaoxin processor
      with family==0x6.

This series was tested on x86_64-linux-gnu.

MayShao (3):
  x86: Add CPU Vendor ID detection support for Zhaoxin processors
  x86: Add cache information support for Zhaoxin processors
  x86: Add the test cse of __get_cpu_features support for Zhaoxin
    processors

 sysdeps/x86/cacheinfo.c            | 185 +++++++++++++++++++++++++++++++++++++
 sysdeps/x86/cpu-features.c         |  58 ++++++++++++
 sysdeps/x86/cpu-features.h         |   1 +
 sysdeps/x86/tst-get-cpu-features.c |   2 +
 4 files changed, 246 insertions(+)

--
2.7.4



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Comments

May Shao(BJ-RD) April 7, 2020, 10:25 a.m. UTC | #1
Ping.
>
> This patch series fix Shanghai Zhaoxin processor CPU Vendor ID detection
> problem in glibc sysdep module. Current glibc doesn't recognize Zhaoxin CPU
> Vendor ID("CentaurHauls" and "Shanghai") and set kind to arch_kind_other.
> These lead to incorrect result of __cache_sysconf(), incorrect value for
> variables like __x86_shared_cache_size, and fail of test case
> tst-get-cpu-features.
>
> Previous version:
> https://sourceware.org/pipermail/libc-alpha/2019-December/109170.html
> More disscussion:
> https://sourceware.org/pipermail/libc-alpha/2019-December/109227.html
>
> Changes from previous version:
>     - Remove the bit_arch_Prefer_MAP_32BIT_EXEC flag on the Zhaoxin
> processor
>       with family==0x6.
>
> This series was tested on x86_64-linux-gnu.
>
> MayShao (3):
>   x86: Add CPU Vendor ID detection support for Zhaoxin processors
>   x86: Add cache information support for Zhaoxin processors
>   x86: Add the test cse of __get_cpu_features support for Zhaoxin
>     processors
>
>  sysdeps/x86/cacheinfo.c            | 185
> +++++++++++++++++++++++++++++++++++++
>  sysdeps/x86/cpu-features.c         |  58 ++++++++++++
>  sysdeps/x86/cpu-features.h         |   1 +
>  sysdeps/x86/tst-get-cpu-features.c |   2 +
>  4 files changed, 246 insertions(+)
>
> --
> 2.7.4



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本邮件含有保密或专有信息,仅供指定收件人使用。严禁对本邮件或其内容做任何未经授权的查阅、使用、复制或转发。
CONFIDENTIAL NOTE:
This email contains confidential or legally privileged information and is for the sole use of its intended recipient. Any unauthorized review, use, copying or forwarding of this email or the content of this email is strictly prohibited.