From patchwork Mon Oct 21 18:02:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Simon Marchi (Code Review)" X-Patchwork-Id: 35205 Received: (qmail 19392 invoked by alias); 21 Oct 2019 18:02:12 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 19384 invoked by uid 89); 21 Oct 2019 18:02:12 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-20.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3 autolearn=ham version=3.3.1 spammy=views, formulation, UD:mep-tdep.c, UD:s12z-tdep.c X-HELO: mx1.osci.io Received: from polly.osci.io (HELO mx1.osci.io) (8.43.85.229) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 21 Oct 2019 18:02:10 +0000 Received: by mx1.osci.io (Postfix, from userid 994) id E7521204CC; Mon, 21 Oct 2019 14:02:08 -0400 (EDT) Received: from gnutoolchain-gerrit.osci.io (gnutoolchain-gerrit.osci.io [8.43.85.239]) by mx1.osci.io (Postfix) with ESMTP id 0360E204BC for ; Mon, 21 Oct 2019 14:02:07 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by gnutoolchain-gerrit.osci.io (Postfix) with ESMTP id DC3A62192A for ; Mon, 21 Oct 2019 14:02:06 -0400 (EDT) X-Gerrit-PatchSet: 1 Date: Mon, 21 Oct 2019 14:02:06 -0400 From: "Tom Tromey (Code Review)" To: gdb-patches@sourceware.org Message-ID: Auto-Submitted: auto-generated X-Gerrit-MessageType: newchange Subject: [review] Fix opcodes includes X-Gerrit-Change-Id: I21428726d55f9fab0c9da90b56f6664f258cf91a X-Gerrit-Change-Number: 201 X-Gerrit-ChangeURL: X-Gerrit-Commit: c5b41fb5094008e866286a60bbf0472dcbb68c06 References: Reply-To: tromey@sourceware.org, gdb-patches@sourceware.org MIME-Version: 1.0 Content-Disposition: inline User-Agent: Gerrit/3.0.3 Change URL: https://gnutoolchain-gerrit.osci.io/r/c/binutils-gdb/+/201 ...................................................................... Fix opcodes includes Now that gdb can unconditionally use a -I pointing at the top of the source tree, we can remove the ugly "../opcodes/" formulation that was needed earlier. This patch adds the -I and cleans up these includes. gdb/ChangeLog 2019-10-21 Tom Tromey * arc-tdep.c: Remove ".." from include. * frv-tdep.c: Remove ".." from include. * lm32-tdep.c: Remove ".." from include. * microblaze-tdep.c: Remove ".." from include. * or1k-tdep.h: Remove ".." from include. * s12z-tdep.c: Remove ".." from include. * Makefile.in (OPCODES_CFLAGS): Add comment. (TOP_CFLAGS): New variable. (INTERNAL_CFLAGS_BASE): Add TOP_CFLAGS. Change-Id: I21428726d55f9fab0c9da90b56f6664f258cf91a --- M gdb/ChangeLog M gdb/Makefile.in M gdb/arc-tdep.c M gdb/frv-tdep.c M gdb/lm32-tdep.c M gdb/mep-tdep.c M gdb/microblaze-tdep.c M gdb/or1k-tdep.h M gdb/s12z-tdep.c 9 files changed, 27 insertions(+), 11 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index f28e69e..b7d5044 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,17 @@ 2019-10-21 Tom Tromey + * arc-tdep.c: Remove ".." from include. + * frv-tdep.c: Remove ".." from include. + * lm32-tdep.c: Remove ".." from include. + * microblaze-tdep.c: Remove ".." from include. + * or1k-tdep.h: Remove ".." from include. + * s12z-tdep.c: Remove ".." from include. + * Makefile.in (OPCODES_CFLAGS): Add comment. + (TOP_CFLAGS): New variable. + (INTERNAL_CFLAGS_BASE): Add TOP_CFLAGS. + +2019-10-21 Tom Tromey + * Makefile.in (READLINE_DIR): Update. 2019-10-21 Tom Tromey diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 8b8860c..da9dc5c 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -455,8 +455,12 @@ # Where are the other opcode tables which only have header file # versions? OP_INCLUDE = $(INCLUDE_DIR)/opcode +# See TOP_CFLAGS as well. OPCODES_CFLAGS = -I$(OP_INCLUDE) +# Allow includes like "opcodes/mumble.h". +TOP_CFLAGS = -I$(top_srcdir)/.. + # The simulator is usually nonexistent; targets that include one # should set this to list all the .o or .a files to be linked in. SIM = @SIM@ @@ -572,7 +576,7 @@ $(GDB_CFLAGS) $(OPCODES_CFLAGS) $(READLINE_CFLAGS) $(ZLIBINC) \ $(BFD_CFLAGS) $(INCLUDE_CFLAGS) $(LIBDECNUMBER_CFLAGS) \ $(INTL_CFLAGS) $(INCGNU) $(ENABLE_CFLAGS) $(INTERNAL_CPPFLAGS) \ - $(SRCHIGH_CFLAGS) + $(SRCHIGH_CFLAGS) $(TOP_CFLAGS) INTERNAL_WARN_CFLAGS = $(INTERNAL_CFLAGS_BASE) $(GDB_WARN_CFLAGS) INTERNAL_CFLAGS = $(INTERNAL_WARN_CFLAGS) $(GDB_WERROR_CFLAGS) diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c index 7f44702..6bcd9b1 100644 --- a/gdb/arc-tdep.c +++ b/gdb/arc-tdep.c @@ -33,7 +33,7 @@ /* ARC header files. */ #include "opcode/arc.h" -#include "../opcodes/arc-dis.h" +#include "opcodes/arc-dis.h" #include "arc-tdep.h" /* Standard headers. */ diff --git a/gdb/frv-tdep.c b/gdb/frv-tdep.c index 866b9e9..7635404 100644 --- a/gdb/frv-tdep.c +++ b/gdb/frv-tdep.c @@ -29,7 +29,7 @@ #include "dis-asm.h" #include "sim-regno.h" #include "gdb/sim-frv.h" -#include "../opcodes/frv-desc.h" /* for the H_SPR_... enums */ +#include "opcodes/frv-desc.h" /* for the H_SPR_... enums */ #include "symtab.h" #include "elf-bfd.h" #include "elf/frv.h" diff --git a/gdb/lm32-tdep.c b/gdb/lm32-tdep.c index 1f746d2..088f035 100644 --- a/gdb/lm32-tdep.c +++ b/gdb/lm32-tdep.c @@ -35,7 +35,7 @@ #include "regcache.h" #include "trad-frame.h" #include "reggroups.h" -#include "../opcodes/lm32-desc.h" +#include "opcodes/lm32-desc.h" #include /* Macros to extract fields from an instruction. */ diff --git a/gdb/mep-tdep.c b/gdb/mep-tdep.c index 056b61a..41eef91 100644 --- a/gdb/mep-tdep.c +++ b/gdb/mep-tdep.c @@ -48,8 +48,8 @@ /* Get the user's customized MeP coprocessor register names from libopcodes. */ -#include "../opcodes/mep-desc.h" -#include "../opcodes/mep-opc.h" +#include "opcodes/mep-desc.h" +#include "opcodes/mep-opc.h" /* The gdbarch_tdep structure. */ diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c index 1248acb..44bfe7f 100644 --- a/gdb/microblaze-tdep.c +++ b/gdb/microblaze-tdep.c @@ -34,8 +34,8 @@ #include "dwarf2-frame.h" #include "osabi.h" #include "target-descriptions.h" -#include "../opcodes/microblaze-opcm.h" -#include "../opcodes/microblaze-dis.h" +#include "opcodes/microblaze-opcm.h" +#include "opcodes/microblaze-dis.h" #include "microblaze-tdep.h" #include "remote.h" diff --git a/gdb/or1k-tdep.h b/gdb/or1k-tdep.h index e66c4a1..fbd3e95 100644 --- a/gdb/or1k-tdep.h +++ b/gdb/or1k-tdep.h @@ -23,8 +23,8 @@ #define TARGET_OR1K #endif -#include "../opcodes/or1k-desc.h" -#include "../opcodes/or1k-opc.h" +#include "opcodes/or1k-desc.h" +#include "opcodes/or1k-opc.h" /* General Purpose Registers */ #define OR1K_ZERO_REGNUM 0 diff --git a/gdb/s12z-tdep.c b/gdb/s12z-tdep.c index 1f3a9e2..094698d 100644 --- a/gdb/s12z-tdep.c +++ b/gdb/s12z-tdep.c @@ -30,7 +30,7 @@ #include "opcode/s12z.h" #include "trad-frame.h" #include "remote.h" -#include "../opcodes/s12z-opc.h" +#include "opcodes/s12z-opc.h" /* Two of the registers included in S12Z_N_REGISTERS are the CCH and CCL "registers" which are just views into