From patchwork Thu Jan 23 19:40:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 37516 Received: (qmail 17287 invoked by alias); 23 Jan 2020 19:40:31 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 17279 invoked by uid 89); 23 Jan 2020 19:40:31 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-8.6 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3 autolearn=ham version=3.3.1 spammy=sk:inferio, approximately X-HELO: esa3.hgst.iphmx.com Received: from esa3.hgst.iphmx.com (HELO esa3.hgst.iphmx.com) (216.71.153.141) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 23 Jan 2020 19:40:29 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1579808430; x=1611344430; h=date:from:to:cc:subject:in-reply-to:message-id: references:mime-version; bh=3gTN3fAgSh3HOLiWaXtw4+UMJ7Yi7MWYo7cjqnWn880=; b=ngnpVd4kxUMwf/Ve4Act5BnE56DfmA430lK5bKftVIiZ7d/VDLwpPDah DC64FequraKfVqZEY+aeWFvrnD34vgjc0gi4dcKHSXjcOFajAQMB7UtPS DKN5z5/Le7VwrTb+O8inOpByolazgPYUXMUYC1CFYO8KpVJ3Ztp8PjoGi TlS49wDoCNxn7EI9BUdv2qczs+KKmaELAmVaeTQBSaFfdhsSExSQJCmdM pLY6lBzLuwo2cWbUfBCZsx7RTeWD1Yw6cRawzl4BbiQEMNhrS9h63hU0l ovGCjjvkXlGmy3rM9An+JoaFGetU4hScEuI11XUQSzTNpci5WHoLbtvXM g==; IronPort-SDR: PgKdmjVezYpeVvPotR85rLZK04RG0KDaffr/BKbgS2P49fNxqft39DVhdZFezWIuHT+yZZiLfv Jx5Fpzw6BWy23fS8KpzqzaohNqucdcnr5YIjawvP93O6PShQyVUTvNB3IgTb/e4Evd75ftoo6N 5jD/NVjxQqIVmeqwFQxySe6+1+YjrGYnc6mRPg9wzhKhGKdrfpL0/JpXa6ZkGAvqylotc0ArG5 Vh/BdZjg4k5TSsrkaIQ/hiiU9xfVmejQSD32jJ6rs+E3zXV+8Ir7BET7FTdKdtkoOnwmW+cvTh o9Q= Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 24 Jan 2020 03:40:28 +0800 IronPort-SDR: 3FjzdB9LXtkio2KWghbZfKy9eOm40QEvTpU3JCYLANEaOj26CNrz6DZ3UAxRCD6FW8xU+0w1vS UMzuSjkrnH7VHFH0g3s8qPeqjciDugzYxfSdfhjwjCDmNoA6X4q0an3ZAoBcXHi1CG9xOeukmP u6PyVgVN/ygQjMouW9jSQOTQrhKprZew0WM0lnp1xIj7THpw0Of1YHLrKyZe03v2uvhmL3okah oGdT/t2m2zxsYHxhHCDqNMnGUQqe5i0a0puEaYK5A+wCCMpgbleSlJS2zp2Bs87ZlIMayhhW+L TJgt/e2Vfs2NAuwKdpQFXkm+ Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2020 11:33:50 -0800 IronPort-SDR: cuyPuO109gNdhrkyZCBYfAr8D51FgfvfnhcmivmtN9g7Z3a/IuBqkJtK0yz+SPkPZzoXzsuJS+ PRlbeOIbz+HjopSKHT8Lcw4k45cEnjAPPIB8Opr5KG0u9blK82v4aV+KU/NMM+swp46woOkuCv o7N3U7xj2CztTtFbCIUAVb66fYcIXCdzvCV44dmakpmd0xiOh2NAVas2rwDMr7O2bQJ7LzK2Y8 btzAs19zGWozdF+e6v/LW+DoVFsQzsZDUhhPO5YBcaLuDNyXMoT12pwkvcYG1MZa/OkqQdcyLg eCE= WDCIronportException: Internal Received: from unknown (HELO redsun52) ([10.149.66.28]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2020 11:40:26 -0800 Date: Thu, 23 Jan 2020 19:40:22 +0000 (GMT) From: "Maciej W. Rozycki" To: gdb-patches@sourceware.org cc: Jim Wilson , Andrew Burgess , Palmer Dabbelt , Tom Tromey , guoren@kernel.org, lifang_xia@c-sky.com, yunhai_shang@c-sky.com, jiangshuai_li@c-sky.com Subject: [PATCH 1/4] RISC-V/Linux/native: Determine FLEN dynamically In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (LFD 202 2017-01-01) MIME-Version: 1.0 Fix RISC-V native Linux support to handle a 64-bit FPU (FLEN == 64) with both RV32 and RV64 systems, which is a part of the current Linux ABI for hard-float systems, rather than assuming that (FLEN == XLEN). We can do better however and not rely on any particular value of FLEN and probe for it dynamically, by observing that the PTRACE_GETREGSET ptrace(2) call will only accept an exact regset size, and that will reflect FLEN. Therefore iterate over the call with a geometrically increasing regset size until a match is marked by a successful ptrace(2) call completion or we run beyond the maximum size we can support. Also handle a glibc bug where ELF_NFPREG is defined in terms of NFPREG, however NFPREG is nowhere defined. gdb/ * riscv-linux-nat.c [!NFPREG] (NFPREG): New macro. (riscv_linux_nat_target::read_description): Determine FLEN dynamically. --- Hi, Smoke-testing indicates no immediate problems with this change; full regression-testing is still running and will take approximately 3 days. Maciej --- gdb/riscv-linux-nat.c | 49 +++++++++++++++++++++++++++++++++++++------------ 1 file changed, 37 insertions(+), 12 deletions(-) gdb-riscv-linux-nat-flen.diff Index: binutils-gdb/gdb/riscv-linux-nat.c =================================================================== --- binutils-gdb.orig/gdb/riscv-linux-nat.c +++ binutils-gdb/gdb/riscv-linux-nat.c @@ -28,6 +28,11 @@ #include +/* Work around glibc header breakage causing ELF_NFPREG not to be usable. */ +#ifndef NFPREG +# define NFPREG 33 +#endif + /* RISC-V Linux native additions to the default linux support. */ class riscv_linux_nat_target final : public linux_nat_target @@ -166,8 +171,8 @@ const struct target_desc * riscv_linux_nat_target::read_description () { struct riscv_gdbarch_features features; - struct iovec iov; elf_fpregset_t regs; + int flen; int tid; /* Figuring out xlen is easy. */ @@ -175,19 +180,39 @@ riscv_linux_nat_target::read_description tid = inferior_ptid.lwp (); - iov.iov_base = ®s; - iov.iov_len = sizeof (regs); + /* Start with no f-registers. */ + features.flen = 0; - /* Can we fetch the f-registers? */ - if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, - (PTRACE_TYPE_ARG3) &iov) == -1) - features.flen = 0; /* No f-registers. */ - else + /* How much worth of f-registers can we fetch if any? */ + for (flen = sizeof (regs.__f.__f[0]); ; flen *= 2) { - /* TODO: We need a way to figure out the actual length of the - f-registers. We could have 64-bit x-registers, with 32-bit - f-registers. For now, just assumed xlen and flen match. */ - features.flen = features.xlen; + size_t regset_size; + struct iovec iov; + + /* Regsets have a uniform slot size, so we count FSCR like an FGR. */ + regset_size = ELF_NFPREG * flen; + if (regset_size > sizeof (regs)) + break; + + iov.iov_base = ®s; + iov.iov_len = regset_size; + if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, + (PTRACE_TYPE_ARG3) &iov) == -1) + { + switch (errno) + { + case EINVAL: + continue; + case EIO: + break; + default: + perror_with_name (_("Couldn't get registers")); + break; + } + } + else + features.flen = flen; + break; } return riscv_create_target_description (features);