From patchwork Thu Oct 6 16:01:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 16307 Received: (qmail 107012 invoked by alias); 6 Oct 2016 16:01:27 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 106945 invoked by uid 89); 6 Oct 2016 16:01:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=transfers, displayed, cooked, transfer X-HELO: mailapp01.imgtec.com Received: from mailapp02.imgtec.com (HELO mailapp01.imgtec.com) (217.156.133.132) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 06 Oct 2016 16:01:25 +0000 Received: from HHMAIL03.hh.imgtec.org (unknown [10.44.0.21]) by Forcepoint Email with ESMTPS id 96D4462FDEB56 for ; Thu, 6 Oct 2016 17:01:19 +0100 (IST) Received: from HHMAIL01.hh.imgtec.org (10.100.10.19) by HHMAIL03.hh.imgtec.org (10.44.0.21) with Microsoft SMTP Server (TLS) id 14.3.294.0; Thu, 6 Oct 2016 17:01:22 +0100 Received: from [10.20.78.81] (10.20.78.81) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server id 14.3.294.0; Thu, 6 Oct 2016 17:01:21 +0100 Date: Thu, 6 Oct 2016 17:01:14 +0100 From: "Maciej W. Rozycki" To: Subject: [committed] mips-tdep: Rearrange comments in `mips_pseudo_register_type' Message-ID: User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Rearrange comments throughout `mips_pseudo_register_type', placing them ahead the condtionals they apply to consistently. gdb/ * mips-tdep.c (mips_pseudo_register_type): Rearrange comments throughout. --- gdb-mips-pseudo-type-format.diff Index: binutils/gdb/mips-tdep.c =================================================================== --- binutils.orig/gdb/mips-tdep.c 2016-10-03 19:14:02.950432858 +0100 +++ binutils/gdb/mips-tdep.c 2016-10-04 15:00:39.679662125 +0100 @@ -1074,9 +1074,9 @@ mips_pseudo_register_type (struct gdbarc if (TYPE_LENGTH (rawtype) == 0) return rawtype; + /* Present the floating point registers however the hardware did; + do not try to convert between FPU layouts. */ if (mips_float_register_p (gdbarch, rawnum)) - /* Present the floating point registers however the hardware did; - do not try to convert between FPU layouts. */ return rawtype; /* Use pointer types for registers if we can. For n32 we can not, @@ -1103,19 +1103,17 @@ mips_pseudo_register_type (struct gdbarc && rawnum < mips_regnum (gdbarch)->dspacc + 6))) return builtin_type (gdbarch)->builtin_int32; + /* The pseudo/cooked view of embedded registers is always + 32-bit, even if the target transfers 64-bit values for them. + New targets relying on XML descriptions should only transfer + the necessary 32 bits, but older versions of GDB expected 64, + so allow the target to provide 64 bits without interfering + with the displayed type. */ if (gdbarch_osabi (gdbarch) != GDB_OSABI_IRIX && gdbarch_osabi (gdbarch) != GDB_OSABI_LINUX && rawnum >= MIPS_EMBED_FP0_REGNUM + 32 && rawnum <= MIPS_LAST_EMBED_REGNUM) - { - /* The pseudo/cooked view of embedded registers is always - 32-bit, even if the target transfers 64-bit values for them. - New targets relying on XML descriptions should only transfer - the necessary 32 bits, but older versions of GDB expected 64, - so allow the target to provide 64 bits without interfering - with the displayed type. */ - return builtin_type (gdbarch)->builtin_int32; - } + return builtin_type (gdbarch)->builtin_int32; /* For all other registers, pass through the hardware type. */ return rawtype;