From patchwork Tue Sep 29 23:47:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Bowman X-Patchwork-Id: 8883 Received: (qmail 6385 invoked by alias); 29 Sep 2015 23:48:52 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 6366 invoked by uid 89); 29 Sep 2015 23:48:51 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.6 required=5.0 tests=AWL, BAYES_50, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_LOW autolearn=no version=3.3.2 X-HELO: smtp-out6.electric.net Received: from smtp-out6.electric.net (HELO smtp-out6.electric.net) (192.162.217.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 29 Sep 2015 23:48:50 +0000 Received: from 1Zh4db-0005tQ-UC by out6a.electric.net with emc1-ok (Exim 4.85) (envelope-from ) id 1Zh4db-0005uV-W6 for gdb-patches@sourceware.org; Tue, 29 Sep 2015 16:48:47 -0700 Received: by emcmailer; Tue, 29 Sep 2015 16:48:47 -0700 Received: from [188.39.184.227] (helo=GLAEXCH3.ftdi.local) by out6a.electric.net with esmtps (TLSv1:AES128-SHA:128) (Exim 4.85) (envelope-from ) id 1Zh4db-0005tQ-UC for gdb-patches@sourceware.org; Tue, 29 Sep 2015 16:48:47 -0700 Received: from GLAEXCH1.ftdi.local ([172.16.0.121]) by glaexch3 ([172.16.0.161]) with mapi id 14.01.0438.000; Wed, 30 Sep 2015 00:47:35 +0100 From: James Bowman To: "gdb-patches@sourceware.org" Subject: [PATCH, FT32] sim: correct simulation of MEMCPY and MEMSET Date: Tue, 29 Sep 2015 23:47:34 +0000 Message-ID: MIME-Version: 1.0 X-Outbound-IP: 188.39.184.227 X-Env-From: james.bowman@ftdichip.com X-PolicySMART: 3094660 The MEMCPY and MEMSET instructions should only examine the low 15 bits of their length arguments. OK to apply? [sim/ft32] 2015-09-28 James Bowman * interp.c (step_once): correct length for MEMSET and MEMCPY instructions. diff --git a/sim/ft32/interp.c b/sim/ft32/interp.c index a20907c..ed50b0e 100644 --- a/sim/ft32/interp.c +++ b/sim/ft32/interp.c @@ -598,7 +598,7 @@ step_once (SIM_DESC sd) uint32_t src = r_1v; uint32_t dst = cpu->state.regs[r_d]; uint32_t i; - for (i = 0; i < rimmv; i++) + for (i = 0; i < (rimmv & 0x7fff); i++) PUT_BYTE (dst + i, GET_BYTE (src + i)); } break; @@ -617,7 +617,7 @@ step_once (SIM_DESC sd) /* memset instruction. */ uint32_t dst = cpu->state.regs[r_d]; uint32_t i; - for (i = 0; i < rimmv; i++) + for (i = 0; i < (rimmv & 0x7fff); i++) PUT_BYTE (dst + i, r_1v); } break;