From patchwork Wed Feb 28 07:38:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Metzger, Markus T" X-Patchwork-Id: 26118 Received: (qmail 113952 invoked by alias); 28 Feb 2018 07:38:10 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 113943 invoked by uid 89); 28 Feb 2018 07:38:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.8 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy= X-HELO: mga06.intel.com Received: from mga06.intel.com (HELO mga06.intel.com) (134.134.136.31) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 28 Feb 2018 07:38:08 +0000 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Feb 2018 23:38:05 -0800 X-ExtLoop1: 1 Received: from irsmsx108.ger.corp.intel.com ([163.33.3.3]) by orsmga004.jf.intel.com with ESMTP; 27 Feb 2018 23:38:04 -0800 Received: from irsmsx104.ger.corp.intel.com ([169.254.5.101]) by IRSMSX108.ger.corp.intel.com ([169.254.11.9]) with mapi id 14.03.0319.002; Wed, 28 Feb 2018 07:38:03 +0000 From: "Metzger, Markus T" To: Eli Zaretskii CC: "gdb-patches@sourceware.org" Subject: RE: [PATCH 2/2] btrace: set/show record btrace cpu Date: Wed, 28 Feb 2018 07:38:03 +0000 Message-ID: References: <1519379570-16643-1-git-send-email-markus.t.metzger@intel.com> <1519379570-16643-2-git-send-email-markus.t.metzger@intel.com> <83woz34xuj.fsf@gnu.org> <83lgff1s4n.fsf@gnu.org> <83y3jez3yw.fsf@gnu.org> In-Reply-To: <83y3jez3yw.fsf@gnu.org> x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYzIwYmJjNTEtOTQwYi00ZDBmLTkwYjctMDBiNTU0ZWVlYzczIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiJFNnU3ZzVPREdHSllcL0djdmQ4MnFhdTUxRXQ5ejZFb1ZobHFtUHB1U29aREhmXC9Od2VxR1pTeURyZnV0c1RkQnkifQ== dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action MIME-Version: 1.0 X-IsSubscribed: yes Hello Eli, > Thanks. Then I suggest to have this text in the manual: > > @item set record btrace cpu @var{identifier} > Set the processor to be used for enabling workarounds for processor > errata when decoding the trace. > > @cindex processor errata > @dfn{Processor errata} are bugs in processor firmware that can cause > a trace not to match the specification. Trace decoders that are > unaware of these errata might fail to decode such a trace. > @value{GDBN} can detect erroneous trace packets and correct them, > thus avoiding the decoding failures. These corrections are known as > @dfn{errata workarounds}, and are enabled based on the processor on > which the trace was recorded. I'm not sure whether the term 'firmware' is correct. I would instead phrase it like this: "Errata may cause the recorded trace to not match the specification. This, in turn, may cause trace decode to fail". Then continue with "@value{GDBN} can detect ..." as you suggested. > By default, @value{GDBN} attempts to detect the processor > automatically, and apply the necessary workarounds for it. However, > you may need to specify the processor if @value{GDBN} does not yet > support it. This command allows you to do that, and also allows to > disable the workarounds. That sounds good. Thanks for your help. Below is the full doc patch. regards, Markus. --- Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Christian Lamprechter Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928 diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index ee7adc8..2abb8d7 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -6952,10 +6952,72 @@ and to read-write memory. Beware that the accessed memory corresponds to the live target and not necessarily to the current replay position. +@item set record btrace cpu @var{identifier} +Set the processor to be used for enabling workarounds for processor +errata when decoding the trace. + +Errata may cause the recorded trace to not match the specification. +This, in turn, may cause trace decode to fail. @value{GDBN} can +detect erroneous trace packets and correct them, thus avoiding the +decoding failures. These corrections are known as @dfn{errata +workarounds}, and are enabled based on the processor on which the +trace was recorded. + +By default, @value{GDBN} attempts to detect the processor +automatically, and apply the necessary workarounds for it. However, +you may need to specify the processor if @value{GDBN} does not yet +support it. This command allows you to do that, and also allows to +disable the workarounds. + +The argument @var{identifier} identifies the @sc{cpu} and is of the +form: @code{@var{vendor}:@var{procesor identifier}}. In addition, +there are two special identifiers, @code{none} and @code{auto} +(default). + +The following vendor identifiers and corresponding processor +identifiers are currently supported: + +@multitable @columnfractions .1 .9 + +@item @code{intel} +@tab @var{family}/@var{model}[/@var{stepping}] + +@end multitable + +On GNU/Linux systems, the processor @var{family}, @var{model}, and +@var{stepping} can be obtained from @code{/proc/cpuinfo}. + +If @var{identifier} is @code{auto}, enable errata workarounds for the +processor on which the trace was recorded. If @var{identifier} is +@code{none}, errata workarounds are disabled. + +For example, when using an old @value{GDBN} on a new system, decode +may fail because @value{GDBN} does not support the new processor. It +often suffices to specify an older processor that @value{GDBN} +supports. + +@smallexample +(gdb) info record +Active record target: record-btrace +Recording format: Intel Processor Trace. +Buffer size: 16kB. +Failed to configure the Intel Processor Trace decoder: unknown cpu. +(gdb) set record btrace cpu intel:6/158 +(gdb) info record +Active record target: record-btrace +Recording format: Intel Processor Trace. +Buffer size: 16kB. +Recorded 84872 instructions in 3189 functions (0 gaps) for thread 1 (...). +@end smallexample + @kindex show record btrace @item show record btrace replay-memory-access Show the current setting of @code{replay-memory-access}. +@item show record btrace cpu +Show the processor to be used for enabling trace decode errata +workarounds. + @kindex set record btrace bts @item set record btrace bts buffer-size @var{size} @itemx set record btrace bts buffer-size unlimited