[moxie,sim] Add mul.x and umul.x instruction support
Commit Message
This patch adds support for the new mul.x and umul.x instructions for
the moxie simulator. I'm checking this in.
Thanks,
AG
From sim/moxie/ChangeLog
2014-12-24 Anthony Green <green@moxielogic.com>
* interp.c (sim_resume): Add mul.x and umul.x instructions.
Comments
> 2014-12-24 Anthony Green <green@moxielogic.com>
>
> * interp.c (sim_resume): Add mul.x and umul.x instructions.
>
>
> diff --git a/sim/moxie/interp.c b/sim/moxie/interp.c
> index fdb6528..f57d166 100644
> --- a/sim/moxie/interp.c
> +++ b/sim/moxie/interp.c
> @@ -622,8 +622,30 @@ sim_resume (sd, step, siggnal)
> cpu.asregs.regs[a] = (int) bv & 0xffff;
> }
> break;
> - case 0x14: /* bad */
> - case 0x15: /* bad */
> + case 0x14: /* mul.x */
> + {
> + int a = (inst >> 4) & 0xf;
> + int b = inst & 0xf;
> + unsigned av = cpu.asregs.regs[a];
> + unsigned bv = cpu.asregs.regs[b];
> + TRACE("mul.x");
> + signed long long r =
> + (signed long long) av * (signed long long) bv;
> + cpu.asregs.regs[a] = r >> 32;
Can you add an empty line after the local variable declarations?
This is part of GDB's Coding Standard...
Also, you appear to have some code in between local variable
declarations, which is not allowed (non C90, I think). Can you fix?
> + }
> + break;
> + case 0x15: /* umul.x */
> + {
> + int a = (inst >> 4) & 0xf;
> + int b = inst & 0xf;
> + unsigned av = cpu.asregs.regs[a];
> + unsigned bv = cpu.asregs.regs[b];
> + TRACE("umul.x");
> + unsigned long long r =
> + (unsigned long long) av * (unsigned long long) bv;
> + cpu.asregs.regs[a] = r >> 32;
Same here.
> + }
> + break;
> case 0x16: /* bad */
> case 0x17: /* bad */
> case 0x18: /* bad */
Thank you,
On Wed, Dec 24, 2014 at 5:43 AM, Joel Brobecker <brobecker@adacore.com> wrote:
>> 2014-12-24 Anthony Green <green@moxielogic.com>
>> [...]
> Can you add an empty line after the local variable declarations?
> This is part of GDB's Coding Standard...
>
> Also, you appear to have some code in between local variable
> declarations, which is not allowed (non C90, I think). Can you fix?
Maybe as a "baby step" towards a more modern gdb, can we relax these
for the sim tree?
Just a suggestion, I don't have a strong opinion, other than lamenting
the ways in which gdb is held back.
[I can't remember the last time we had this discussion for the sim tree.
If it was in the recent past, apologies. Let me know and I'll add
something to the wiki
to help prevent bringing this up again, at least in the near future.]
> Maybe as a "baby step" towards a more modern gdb, can we relax these
> for the sim tree?
>
> Just a suggestion, I don't have a strong opinion, other than lamenting
> the ways in which gdb is held back.
Personally speaking, I tend to prefer variables that are declared
all together, so I do not see this rule as "holding back" GDB.
@@ -622,8 +622,30 @@ sim_resume (sd, step, siggnal)
cpu.asregs.regs[a] = (int) bv & 0xffff;
}
break;
- case 0x14: /* bad */
- case 0x15: /* bad */
+ case 0x14: /* mul.x */
+ {
+ int a = (inst >> 4) & 0xf;
+ int b = inst & 0xf;
+ unsigned av = cpu.asregs.regs[a];
+ unsigned bv = cpu.asregs.regs[b];
+ TRACE("mul.x");
+ signed long long r =
+ (signed long long) av * (signed long long) bv;
+ cpu.asregs.regs[a] = r >> 32;
+ }
+ break;
+ case 0x15: /* umul.x */
+ {
+ int a = (inst >> 4) & 0xf;
+ int b = inst & 0xf;
+ unsigned av = cpu.asregs.regs[a];
+ unsigned bv = cpu.asregs.regs[b];
+ TRACE("umul.x");
+ unsigned long long r =
+ (unsigned long long) av * (unsigned long long) bv;
+ cpu.asregs.regs[a] = r >> 32;
+ }
+ break;
case 0x16: /* bad */
case 0x17: /* bad */
case 0x18: /* bad */