From patchwork Thu May 7 16:15:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Arnez X-Patchwork-Id: 6608 Received: (qmail 43348 invoked by alias); 7 May 2015 16:15:37 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 43316 invoked by uid 89); 7 May 2015 16:15:33 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL, BAYES_00, KAM_LAZY_DOMAIN_SECURITY, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: e06smtp11.uk.ibm.com Received: from e06smtp11.uk.ibm.com (HELO e06smtp11.uk.ibm.com) (195.75.94.107) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (CAMELLIA256-SHA encrypted) ESMTPS; Thu, 07 May 2015 16:15:30 +0000 Received: from /spool/local by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 7 May 2015 17:15:26 +0100 Received: from d06dlp01.portsmouth.uk.ibm.com (9.149.20.13) by e06smtp11.uk.ibm.com (192.168.101.141) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Thu, 7 May 2015 17:15:24 +0100 Received: from b06cxnps3075.portsmouth.uk.ibm.com (d06relay10.portsmouth.uk.ibm.com [9.149.109.195]) by d06dlp01.portsmouth.uk.ibm.com (Postfix) with ESMTP id AE7BD17D805A for ; Thu, 7 May 2015 17:16:09 +0100 (BST) Received: from d06av09.portsmouth.uk.ibm.com (d06av09.portsmouth.uk.ibm.com [9.149.37.250]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t47GFOo511207006 for ; Thu, 7 May 2015 16:15:24 GMT Received: from d06av09.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av09.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t47GFNtw003105 for ; Thu, 7 May 2015 10:15:23 -0600 Received: from br87z6lw.de.ibm.com (dyn-9-152-212-115.boeblingen.de.ibm.com [9.152.212.115]) by d06av09.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t47GFNLo003074 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA256 bits=256 verify=NO); Thu, 7 May 2015 10:15:23 -0600 From: Andreas Arnez To: gdb-patches@sourceware.org Cc: Ulrich Weigand , Sergio Durigan Junior Subject: [PATCH] S390: Fix for inadvertently setting 24-bit mode in fill_gregset Date: Thu, 07 May 2015 18:15:23 +0200 Message-ID: <871tise544.fsf@br87z6lw.de.ibm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15050716-0041-0000-0000-000004523E95 X-IsSubscribed: yes On 64-bit S390 platforms, for programs compiled with -m31, it could happen that GDB inadvertently cleared the inferior's 31-bit addressing mode bit and left the inferior running in 24-bit addressing mode. In particular this occurred with checkpoint.exp, when the "restore" command needed to create a new regcache copy: At the time when the PSWM register was copied over, the addressing mode bit was taken from the PSWA register, which was still zero since it had not been copied yet. And when the PSWA register was copied, the addressing mode was not updated again. The fix affects fill_gregset, where the bits "belonging" to each of the PSWA and PSWM registers are now carefully separated. The addressing mode bit is no longer touched when writing PSWM, and -- more importantly -- it *is* written when writing PSWA. gdb/ChangeLog: Andreas Arnez * s390-linux-nat.c (fill_gregset): Avoid relying on the PSWA register in the regcache when treating the PSWM register, and vice versa. --- gdb/s390-linux-nat.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/gdb/s390-linux-nat.c b/gdb/s390-linux-nat.c index 9298bcc..4cd3192 100644 --- a/gdb/s390-linux-nat.c +++ b/gdb/s390-linux-nat.c @@ -156,19 +156,29 @@ fill_gregset (const struct regcache *regcache, gregset_t *regp, int regno) enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); ULONGEST pswa, pswm; gdb_byte buf[4]; + gdb_byte *pswm_p = (gdb_byte *) regp + S390_PSWM_OFFSET; + gdb_byte *pswa_p = (gdb_byte *) regp + S390_PSWA_OFFSET; - regcache_raw_collect (regcache, S390_PSWM_REGNUM, buf); - pswm = extract_unsigned_integer (buf, 4, byte_order); - regcache_raw_collect (regcache, S390_PSWA_REGNUM, buf); - pswa = extract_unsigned_integer (buf, 4, byte_order); + pswm = extract_unsigned_integer (pswm_p, 8, byte_order); if (regno == -1 || regno == S390_PSWM_REGNUM) - store_unsigned_integer ((gdb_byte *) regp + S390_PSWM_OFFSET, 8, - byte_order, ((pswm & 0xfff7ffff) << 32) | - (pswa & 0x80000000)); + { + pswm &= 0x80000000; + regcache_raw_collect (regcache, S390_PSWM_REGNUM, buf); + pswm |= (extract_unsigned_integer (buf, 4, byte_order) + & 0xfff7ffff) << 32; + } + if (regno == -1 || regno == S390_PSWA_REGNUM) - store_unsigned_integer ((gdb_byte *) regp + S390_PSWA_OFFSET, 8, - byte_order, pswa & 0x7fffffff); + { + regcache_raw_collect (regcache, S390_PSWA_REGNUM, buf); + pswa = extract_unsigned_integer (buf, 4, byte_order); + pswm ^= (pswm ^ pswa) & 0x80000000; + pswa &= 0x7fffffff; + store_unsigned_integer (pswa_p, 8, byte_order, pswa); + } + + store_unsigned_integer (pswm_p, 8, byte_order, pswm); } return; }