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[10/11] Add XTENSA_MAX_REGISTER_SIZE

Message ID 634078F3-1AE6-458C-8184-549175C95BB7@arm.com
State New
Headers show

Commit Message

Alan Hayward June 21, 2017, 9:35 a.m. UTC
Adding Woody and Max, the xtensa maintainers.
Patch is to remove uses of MAX_REGISTER_SIZE in xtensa-tdep.c
Re-pasted patch to end of email for convenience.


> On 12 Jun 2017, at 10:54, Yao Qi <qiyaoltc@gmail.com> wrote:

> 

> Alan Hayward <Alan.Hayward@arm.com> writes:

> 

>> I don't have a XTENSA machine to test on.

>> Tested on a --enable-targets=all and asan build using

>> make check with board files unix, native-gdbserver and unittest

>> 

>> Ok to commit?

>> 

>> Alan.

>> 

>> 2017-06-08  Alan Hayward  <alan.hayward@arm.com>

>> 

>> 	* xtensa-tdep.c (XTENSA_MAX_REGISTER_SIZE): Add.

>> 	(xtensa_register_write_masked): Use XTENSA_MAX_REGISTER_SIZE.

>> 	(xtensa_register_read_masked): Likewise.

> 

> Hi Maxim,

> What do you think about this patch?

> 

> -- 

> Yao (齐尧)

Comments

Max Filippov June 22, 2017, 4:40 p.m. UTC | #1
Hi Alan,

On Wed, Jun 21, 2017 at 2:35 AM, Alan Hayward <Alan.Hayward@arm.com> wrote:
> Adding Woody and Max, the xtensa maintainers.
> Patch is to remove uses of MAX_REGISTER_SIZE in xtensa-tdep.c
> Re-pasted patch to end of email for convenience.

the change looks good to me.
diff mbox

Patch

diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
index f9e858473a409ff082d30f9ff474d48da63903e3..f875f20d32b68abc37e3db37ab3e6053918536e5 100644
--- a/gdb/xtensa-tdep.c
+++ b/gdb/xtensa-tdep.c
@@ -120,6 +120,9 @@  static unsigned int xtensa_debug_level = 0;
 #define PS_WOE			(1<<18)
 #define PS_EXC			(1<<4)

+/* Big enough to hold the size of the largest register in bytes.  */
+#define XTENSA_MAX_REGISTER_SIZE	64
+
 static int
 windowing_enabled (struct gdbarch *gdbarch, unsigned int ps)
 {
@@ -370,7 +373,7 @@  static void
 xtensa_register_write_masked (struct regcache *regcache,
 			      xtensa_register_t *reg, const gdb_byte *buffer)
 {
-  unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
+  unsigned int value[(XTENSA_MAX_REGISTER_SIZE + 3) / 4];
   const xtensa_mask_t *mask = reg->mask;

   int shift = 0;		/* Shift for next mask (mod 32).  */
@@ -454,7 +457,7 @@  static enum register_status
 xtensa_register_read_masked (struct regcache *regcache,
 			     xtensa_register_t *reg, gdb_byte *buffer)
 {
-  unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
+  unsigned int value[(XTENSA_MAX_REGISTER_SIZE + 3) / 4];
   const xtensa_mask_t *mask = reg->mask;

   int shift = 0;