From patchwork Fri Jul 1 16:28:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sivanupandi, Pitchumani" X-Patchwork-Id: 13547 Received: (qmail 126678 invoked by alias); 1 Jul 2016 10:59:13 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 126668 invoked by uid 89); 1 Jul 2016 10:59:12 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.2 required=5.0 tests=BAYES_00, DATE_IN_FUTURE_03_06, RP_MATCHES_RCVD, SPF_PASS autolearn=no version=3.3.2 spammy=simulate, Hx-languages-length:1702, Stop X-HELO: eusmtp01.atmel.com Received: from eusmtp01.atmel.com (HELO eusmtp01.atmel.com) (212.144.249.242) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 01 Jul 2016 10:59:00 +0000 Received: from apsmtp01.atmel.com (10.168.254.30) by eusmtp01.atmel.com (10.161.101.30) with Microsoft SMTP Server id 14.3.235.1; Fri, 1 Jul 2016 12:58:51 +0200 Received: from PENCHT01.corp.atmel.com (10.168.5.161) by apsmtp01.corp.atmel.com (10.168.254.30) with Microsoft SMTP Server (TLS) id 14.3.235.1; Fri, 1 Jul 2016 19:04:04 +0800 Received: from [10.40.233.140] (10.168.5.13) by cas-ap.atmel.com (10.168.5.161) with Microsoft SMTP Server id 14.3.235.1; Fri, 1 Jul 2016 18:58:48 +0800 To: CC: Pedro Alves , Mike Frysinger , Denis Chertykov From: Pitchumani Sivanupandi Subject: [patch, avr, sim] PR19401 - Update PC when simulate break instruction Message-ID: <57769A40.504@atmel.com> Date: Fri, 1 Jul 2016 16:28:48 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 When there is a software breakpoint for avr target, gdb asks remote to write break instruction (0x9598) in the breakpoint location. When target hits breakpoint location the it asks remote to restore the content. Remote will resume from the PC when GDB asks. After executing break instruction AVR MCU's PC will point to next location. It is the remote (gdb-server/ sim) who sets PC to next instruction to be executed (after hitting software breakpoint). So, AVR simulator's PC is expected to point breakpoint location when it hits break insn. Simulator was doing that earlier. It is changed after the commit 9943d3185, which introduces sim_engine_halt to handle break. Since this function jumps to sim_resume using longjmp to sim_resume, code that sets PC (cpu->pc = ipc) is not executed. Following patch will restore the behavior of setting PC on break. case OP_bld: If OK, could someone commit please? I don't have commit access. Regards, Pitchumani sim/ChangeLog 2016-07-01 Pitchumani Sivanupandi PR target/ 19401 * avr/interp.c (step_once): Pass break instruction address to sim_engine_halt function which writes that to PC. Remove code that follows that function call as it is unreachable. diff --git a/sim/avr/interp.c b/sim/avrinterp.c index 31a9940..fcce9b2 100644 --- a/sim/avr/interp.c +++ b/sim/avr/interp.c @@ -911,8 +911,7 @@ step_once (SIM_CPU *cpu) case OP_break: /* Stop on this address. */ - sim_engine_halt (CPU_STATE (cpu), cpu, NULL, cpu->pc, sim_stopped, SIM_SIGTRAP); - cpu->pc = ipc; + sim_engine_halt (CPU_STATE (cpu), cpu, NULL, ipc, sim_stopped, SIM_SIGTRAP); break;