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RFA: AArch64 sim: Add support for the MRS instruction

Message ID 566FF3B5.1080806@redhat.com
State New
Headers show

Commit Message

Nick Clifton Dec. 15, 2015, 11:04 a.m. UTC
Hi Mike,

>> PS. I would be happy to be a maintainer for the AArch64 sim, if that is
>> agreeable.
>
> sounds fine

Great - in which case is it OK to check in the attached patch ?

>> +static uint64_t
>> +system_get (sim_cpu * cpu, unsigned op0, unsigned op1, unsigned crn,
>
> no space after the "*"

Oops.

>> +static void
>> +do_mrs (sim_cpu * cpu)
>
> same here

Doh.

>> +      /*
>>         if (uimm (aarch64_get_instr (cpu), 21, 20) == 0x1)
>> -	/* MSR <sys-reg>, <Xreg>.  */
>> -	return;
>> +        do_msr (cpu);  */
>>         HALT_NYI;
>> +      return;
>
> should there be a TODO or some other note explaining why the code
> is commented out ?

Yes - the comment was intended to indicate that this is where the 
implementation of the MSR instruction should begin, but only if bit 21 
is clear and bit 20 is set.

I have checked in a revised version of the patch with the changes you 
suggested.

Cheers
   Nick

Comments

Mike Frysinger Dec. 26, 2015, 6:55 p.m. UTC | #1
On 15 Dec 2015 11:04, Nick Clifton wrote:
> >> PS. I would be happy to be a maintainer for the AArch64 sim, if that is
> >> agreeable.
> >
> > sounds fine
> 
> Great - in which case is it OK to check in the attached patch ?

sure
-mike
diff mbox

Patch

diff --git a/sim/MAINTAINERS b/sim/MAINTAINERS
index 8dbb457..3cdabf4 100644
--- a/sim/MAINTAINERS
+++ b/sim/MAINTAINERS
@@ -13,6 +13,7 @@  Mike Frysinger			vapier@gentoo.org
 	
 	Maintainers for particular sims:
 
+aarch64		Nick Clifton <nickc@redhat.com>
 arm	        Nick Clifton <nickc@redhat.com>
 bfin		Mike Frysinger <vapier@gentoo.org>
 cr16	        M R Swami Reddy <MR.Swami.Reddy@nsc.com>