From patchwork Fri Oct 2 14:32:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 8915 Received: (qmail 114004 invoked by alias); 2 Oct 2015 14:32:28 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 113983 invoked by uid 89); 2 Oct 2015 14:32:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-Spam-User: qpsmtpd, 2 recipients X-HELO: mail-pa0-f48.google.com Received: from mail-pa0-f48.google.com (HELO mail-pa0-f48.google.com) (209.85.220.48) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 02 Oct 2015 14:32:26 +0000 Received: by pablk4 with SMTP id lk4so107511823pab.3; Fri, 02 Oct 2015 07:32:24 -0700 (PDT) X-Received: by 10.66.142.202 with SMTP id ry10mr20718791pab.86.1443796344746; Fri, 02 Oct 2015 07:32:24 -0700 (PDT) Received: from [127.0.0.1] (power-aix.osuosl.org. [140.211.15.154]) by smtp.gmail.com with ESMTPSA id rs8sm12375368pbb.14.2015.10.02.07.32.22 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Oct 2015 07:32:23 -0700 (PDT) Subject: Re: [PATCH 2/3] [aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insn To: Marcus Shawcroft References: <1443785039-24602-1-git-send-email-yao.qi@linaro.org> <1443785039-24602-3-git-send-email-yao.qi@linaro.org> Cc: "gdb-patches@sourceware.org" , "binutils@sourceware.org" From: Yao Qi Message-ID: <560E9573.7000707@gmail.com> Date: Fri, 2 Oct 2015 15:32:19 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: X-IsSubscribed: yes On 02/10/15 13:35, Marcus Shawcroft wrote: > The usual layout would be: > > extern int > aarch64_decode_insn (.... Sigh, I must be misled by aarch64_zero_register_p above... > > OK with that change. Patch below is what I pushed in. Thanks for the review. diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index aa5ea1c..a93d964 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2015-10-02 Yao Qi + + * aarch64.h (aarch64_decode_insn): Declare it. + 2015-09-29 Dominik Vogt * s390.h (S390_INSTR_FLAG_HTM): New flag. diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index dcf0fef..ac4da28 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -925,6 +925,9 @@ aarch64_stack_pointer_p (const aarch64_opnd_info *); extern int aarch64_zero_register_p (const aarch64_opnd_info *); +extern int +aarch64_decode_insn (aarch64_insn, aarch64_inst *); + /* Given an operand qualifier, return the expected data element size of a qualified operand. */ extern unsigned char diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 051c42b..124ead7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,12 @@ 2015-10-02 Yao Qi + * aarch64-dis.c (disas_aarch64_insn): Remove static. Change + argument insn type to aarch64_insn. Rename to ... + (aarch64_decode_insn): ... it. + (print_insn_aarch64_word): Caller updated. + +2015-10-02 Yao Qi + * aarch64-dis.c (disas_aarch64_insn): Remove argument PC. (print_insn_aarch64_word): Caller updated. diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index e0faeb5..fe3caac 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -2029,10 +2029,11 @@ user_friendly_fixup (aarch64_inst *inst) } } -/* Decode INSN and fill in *INST the instruction information. */ +/* Decode INSN and fill in *INST the instruction information. Return zero + on success. */ -static int -disas_aarch64_insn (uint32_t insn, aarch64_inst *inst) +int +aarch64_decode_insn (aarch64_insn insn, aarch64_inst *inst) { const aarch64_opcode *opcode = aarch64_opcode_lookup (insn); @@ -2171,7 +2172,7 @@ print_insn_aarch64_word (bfd_vma pc, addresses, since the addend is not currently pc-relative. */ pc = 0; - ret = disas_aarch64_insn (word, &inst); + ret = aarch64_decode_insn (word, &inst); if (((word >> 21) & 0x3ff) == 1) {