diff mbox

[2/2] gdb/riscv: Add float status registers to save and restore reggroups

Message ID 23ff86fa4276a041225e325eb863280fe2175b76.1544734579.git.andrew.burgess@embecosm.com
State New, archived
Headers

Commit Message

Andrew Burgess Dec. 13, 2018, 8:57 p.m. UTC 
  We should save and restore the floating point status registers.  This
became an issue when testing 32-bit float on a target with 64-bit with
the gdb.base/callfuncs.exp test.

gdb/ChangeLog:

	* riscv-tdep.c (riscv_register_reggroup_p): Save and restore fcsr,
	fflags, and frm registers.
---
 gdb/ChangeLog    | 5 +++++
 gdb/riscv-tdep.c | 5 ++++-
 2 files changed, 9 insertions(+), 1 deletion(-)
diff mbox

Patch

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 3b737064612..8b542a11b77 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -896,7 +896,10 @@  riscv_register_reggroup_p (struct gdbarch  *gdbarch, int regnum,
   else if (reggroup == restore_reggroup || reggroup == save_reggroup)
     {
       if (riscv_has_fp_regs (gdbarch))
-	return regnum <= RISCV_LAST_FP_REGNUM;
+	return (regnum <= RISCV_LAST_FP_REGNUM
+		|| regnum == RISCV_CSR_FCSR_REGNUM
+		|| regnum == RISCV_CSR_FFLAGS_REGNUM
+		|| regnum == RISCV_CSR_FRM_REGNUM);
       else
 	return regnum < RISCV_FIRST_FP_REGNUM;
     }