From patchwork Fri Dec 22 15:46:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 82765 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 51DCE3858C29 for ; Fri, 22 Dec 2023 15:47:20 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp.gentoo.org (dev.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id 9D82E3858D3C for ; Fri, 22 Dec 2023 15:46:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9D82E3858D3C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gentoo.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 9D82E3858D3C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:470:ea4a:1:5054:ff:fec7:86e4 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703260025; cv=none; b=DJeGbqWE9rdcrfpmWjzj8A0A4PBmsmUfe8JJSr3SLV06FgbS9Jz2Gnq9mBTz0/MlbNGoAjN4cAHiEF+9RqHQmXnnAe0h2bujymcVeSXeLwxGkYHur52Jl28IddKJSXHwQ4d01r53nlo4DAD76LpPAEGeYTFADH0Yrvg4g42k+1o= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703260025; c=relaxed/simple; bh=2RxtbIWN7dwfJDxVb3XmK6PlddYFQVI7emWGW5kG9js=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=UCq4Q8MdwV22CLU6C70Q/DZzf2Sa33MoKWwgxiOxls8OjIzbxIRmPGYMaa+ljqYemrR3qNJQZ9NPp+zq5L9s+T6CwsEVCGvdsznBXOenDgHB87HFRUluSQbV9hgJ/5PwpUeKGgx9iQZwmTZz7U7wh/G/a+Vq2ypjojNccGlupcM= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by smtp.gentoo.org (Postfix, from userid 559) id C2D7233BE26; Fri, 22 Dec 2023 15:46:58 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH] sim: cris: regen cgen decoders to fix build warnings [PR sim/31181] Date: Fri, 22 Dec 2023 10:46:56 -0500 Message-ID: <20231222154656.15283-1-vapier@gentoo.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Bug: https://sourceware.org/PR31181 --- sim/cris/decodev10.c | 218 +++++++++++++++++++++---------------------- sim/cris/decodev32.c | 204 ++++++++++++++++++++-------------------- 2 files changed, 211 insertions(+), 211 deletions(-) diff --git a/sim/cris/decodev10.c b/sim/cris/decodev10.c index cce20bc4f538..7afcddf5b903 100644 --- a/sim/cris/decodev10.c +++ b/sim/cris/decodev10.c @@ -2415,7 +2415,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -2443,7 +2443,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_d_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -2471,7 +2471,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movepcr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_moveq.f UINT f_operand2; @@ -2495,7 +2495,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_moveq: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_moveq.f UINT f_operand2; INT f_s6; @@ -2522,7 +2522,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -2550,7 +2550,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecbr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -2580,7 +2580,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecwr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -2610,7 +2610,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecdr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -2640,7 +2640,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movscbr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f UINT f_operand2; INT f_indir_pc__byte; @@ -2670,7 +2670,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movscwr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f UINT f_operand2; INT f_indir_pc__word; @@ -2700,7 +2700,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movucbr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f UINT f_operand2; INT f_indir_pc__byte; @@ -2730,7 +2730,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movucwr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f UINT f_operand2; INT f_indir_pc__word; @@ -2760,7 +2760,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addq: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addq.f UINT f_operand2; UINT f_u6; @@ -2788,7 +2788,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_r_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -2816,7 +2816,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -2848,7 +2848,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -2880,7 +2880,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_d_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -2912,7 +2912,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcbr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -2942,7 +2942,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcwr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -2972,7 +2972,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcdr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -3002,7 +3002,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpq: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_andq.f UINT f_operand2; INT f_s6; @@ -3029,7 +3029,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpucbr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -3059,7 +3059,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpucwr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -3089,7 +3089,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3121,7 +3121,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3153,7 +3153,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_d_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3185,7 +3185,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3217,7 +3217,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3249,7 +3249,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_sprv10: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f UINT f_operand2; UINT f_operand1; @@ -3277,7 +3277,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_spr_rv10: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_rv10.f UINT f_operand2; UINT f_operand1; @@ -3305,7 +3305,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ret_type: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_rv10.f UINT f_operand2; @@ -3329,7 +3329,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_sprv10: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f UINT f_operand2; UINT f_memmode; @@ -3361,7 +3361,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_c_sprv10_p5: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p5.f UINT f_operand2; INT f_indir_pc__word; @@ -3391,7 +3391,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_c_sprv10_p9: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f INT f_indir_pc__dword; UINT f_operand2; @@ -3421,7 +3421,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_spr_mv10: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f UINT f_operand2; UINT f_memmode; @@ -3466,7 +3466,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movem_r_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_movem_r_m.f UINT f_operand2; UINT f_memmode; @@ -3514,7 +3514,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movem_m_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_movem_m_r.f UINT f_operand2; UINT f_memmode; @@ -3561,7 +3561,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movem_m_pc: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_movem_m_r.f UINT f_memmode; UINT f_operand1; @@ -3604,7 +3604,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -3633,7 +3633,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_d_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -3662,7 +3662,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3695,7 +3695,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3728,7 +3728,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_d_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3761,7 +3761,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcbr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -3792,7 +3792,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcwr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -3823,7 +3823,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcdr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcdr.f INT f_indir_pc__dword; UINT f_operand2; @@ -3854,7 +3854,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcpc: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f INT f_indir_pc__dword; /* Contents of trailing part of insn. */ @@ -3880,7 +3880,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_adds_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3913,7 +3913,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_adds_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3946,7 +3946,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addscbr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -3977,7 +3977,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addscwr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -4027,7 +4027,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_operand1; @@ -4056,7 +4056,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_neg_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -4084,7 +4084,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_neg_d_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -4112,7 +4112,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f UINT f_memmode; UINT f_operand1; @@ -4140,7 +4140,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f UINT f_memmode; UINT f_operand1; @@ -4168,7 +4168,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_d_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f UINT f_memmode; UINT f_operand1; @@ -4196,7 +4196,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4228,7 +4228,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4260,7 +4260,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_d_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4292,7 +4292,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_muls_b: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -4322,7 +4322,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mstep: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -4351,7 +4351,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_dstep: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -4380,7 +4380,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -4409,7 +4409,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_d_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -4438,7 +4438,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4471,7 +4471,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4504,7 +4504,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_d_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4537,7 +4537,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcbr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -4568,7 +4568,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcwr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -4599,7 +4599,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcdr: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcdr.f INT f_indir_pc__dword; UINT f_operand2; @@ -4630,7 +4630,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andq: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_andq.f UINT f_operand2; INT f_s6; @@ -4658,7 +4658,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_swap: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f UINT f_operand2; UINT f_operand1; @@ -4686,7 +4686,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_asrq: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_asrq.f UINT f_operand2; UINT f_u5; @@ -4714,7 +4714,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lsrr_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -4743,7 +4743,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lsrr_d_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -4772,7 +4772,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btst: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -4800,7 +4800,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btstq: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_asrq.f UINT f_operand2; UINT f_u5; @@ -4827,7 +4827,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_setf: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_setf.f UINT f_operand2; UINT f_operand1; @@ -4848,7 +4848,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcc_b: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_b.f UINT f_operand2; UINT f_disp9_lo; @@ -4884,7 +4884,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ba_b: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_b.f UINT f_disp9_lo; INT f_disp9_hi; @@ -4917,7 +4917,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcc_w: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_w.f SI f_indir_pc__word_pcrel; UINT f_operand2; @@ -4946,7 +4946,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ba_w: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_w.f SI f_indir_pc__word_pcrel; /* Contents of trailing part of insn. */ @@ -4972,7 +4972,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jump_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f UINT f_operand2; UINT f_operand1; @@ -5000,7 +5000,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jump_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f UINT f_operand2; UINT f_memmode; @@ -5032,7 +5032,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jump_c: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f INT f_indir_pc__dword; UINT f_operand2; @@ -5062,7 +5062,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_break: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_break.f UINT f_u4; @@ -5085,7 +5085,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -5118,7 +5118,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -5151,7 +5151,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_m_d_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -5184,7 +5184,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cb: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -5215,7 +5215,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cw: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -5246,7 +5246,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cd: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -5277,7 +5277,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_scc: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f UINT f_operand2; UINT f_operand1; @@ -5304,7 +5304,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addoq: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addoq.f UINT f_operand2; INT f_s8; @@ -5331,7 +5331,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bdapqpc: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addoq.f INT f_s8; @@ -5354,7 +5354,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bdap_32_pc: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f INT f_indir_pc__dword; /* Contents of trailing part of insn. */ @@ -5380,7 +5380,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_pcplus_p0: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f UINT f_memmode; @@ -5403,7 +5403,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_spplus_p8: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f UINT f_memmode; @@ -5428,7 +5428,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_b_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -5460,7 +5460,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_w_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -5492,7 +5492,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_d_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -5524,7 +5524,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cb: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -5554,7 +5554,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cw: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -5584,7 +5584,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cd: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -5614,7 +5614,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_dip_m: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f UINT f_memmode; UINT f_operand1; @@ -5642,7 +5642,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_dip_c: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f INT f_indir_pc__dword; /* Contents of trailing part of insn. */ @@ -5662,7 +5662,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi_acr_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_b_r.f UINT f_operand2; UINT f_operand1; @@ -5690,7 +5690,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_biap_pc_b_r: { const IDESC *idesc = &crisv10f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addoq.f UINT f_operand2; diff --git a/sim/cris/decodev32.c b/sim/cris/decodev32.c index 6edf456650f9..e9d453d5e4b6 100644 --- a/sim/cris/decodev32.c +++ b/sim/cris/decodev32.c @@ -1925,7 +1925,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -1953,7 +1953,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -1981,7 +1981,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_moveq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_moveq.f UINT f_operand2; INT f_s6; @@ -2008,7 +2008,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -2036,7 +2036,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -2066,7 +2066,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -2096,7 +2096,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movecdr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -2126,7 +2126,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movscbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f UINT f_operand2; INT f_indir_pc__byte; @@ -2156,7 +2156,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movscwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f UINT f_operand2; INT f_indir_pc__word; @@ -2186,7 +2186,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movucbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f UINT f_operand2; INT f_indir_pc__byte; @@ -2216,7 +2216,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movucwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f UINT f_operand2; INT f_indir_pc__word; @@ -2246,7 +2246,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addq.f UINT f_operand2; UINT f_u6; @@ -2274,7 +2274,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_r_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -2302,7 +2302,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -2334,7 +2334,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -2366,7 +2366,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmp_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -2398,7 +2398,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -2428,7 +2428,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -2458,7 +2458,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpcdr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -2488,7 +2488,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_andq.f UINT f_operand2; INT f_s6; @@ -2515,7 +2515,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpucbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -2545,7 +2545,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_cmpucwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -2575,7 +2575,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -2607,7 +2607,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -2639,7 +2639,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -2671,7 +2671,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_movs_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -2703,7 +2703,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movs_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_movs_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -2735,7 +2735,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_sprv32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f UINT f_operand2; UINT f_operand1; @@ -2763,7 +2763,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_spr_rv32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand2; UINT f_operand1; @@ -2791,7 +2791,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_m_sprv32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f UINT f_operand2; UINT f_memmode; @@ -2823,7 +2823,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_c_sprv32_p2: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f INT f_indir_pc__dword; UINT f_operand2; @@ -2853,7 +2853,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_spr_mv32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_operand2; UINT f_memmode; @@ -2885,7 +2885,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_ss_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_operand2; UINT f_operand1; @@ -2912,7 +2912,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_ss: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand2; UINT f_operand1; @@ -2939,7 +2939,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movem_r_m_v32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_movem_r_m_v32.f UINT f_operand2; UINT f_memmode; @@ -2987,7 +2987,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_movem_m_r_v32: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_movem_m_r_v32.f UINT f_operand2; UINT f_memmode; @@ -3035,7 +3035,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3064,7 +3064,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3093,7 +3093,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3126,7 +3126,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3159,7 +3159,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_add_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3192,7 +3192,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -3223,7 +3223,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -3254,7 +3254,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addcdr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcdr.f INT f_indir_pc__dword; UINT f_operand2; @@ -3285,7 +3285,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_adds_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3318,7 +3318,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_adds_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3351,7 +3351,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addscbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -3382,7 +3382,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addscwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -3413,7 +3413,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addc_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -3446,7 +3446,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lapc_d: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_lapc_d.f SI f_indir_pc__dword_pcrel; UINT f_operand2; @@ -3476,7 +3476,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lapcq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_lapcq.f UINT f_operand2; SI f_qo; @@ -3503,7 +3503,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3532,7 +3532,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_neg_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3560,7 +3560,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_neg_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3588,7 +3588,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_memmode; UINT f_operand1; @@ -3616,7 +3616,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_memmode; UINT f_operand1; @@ -3644,7 +3644,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_test_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_memmode; UINT f_operand1; @@ -3672,7 +3672,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -3704,7 +3704,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -3736,7 +3736,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_move_r_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -3768,7 +3768,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_muls_b: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -3798,7 +3798,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_mcp: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand2; UINT f_operand1; @@ -3827,7 +3827,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_dstep: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -3856,7 +3856,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3885,7 +3885,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -3914,7 +3914,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3947,7 +3947,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -3980,7 +3980,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_and_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_add_m_b_m.f UINT f_operand2; UINT f_memmode; @@ -4013,7 +4013,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcbr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcbr.f INT f_indir_pc__byte; UINT f_operand2; @@ -4044,7 +4044,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcwr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcwr.f INT f_indir_pc__word; UINT f_operand2; @@ -4075,7 +4075,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andcdr: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addcdr.f INT f_indir_pc__dword; UINT f_operand2; @@ -4106,7 +4106,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_andq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_andq.f UINT f_operand2; INT f_s6; @@ -4134,7 +4134,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_swap: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_operand2; UINT f_operand1; @@ -4162,7 +4162,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_asrq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_asrq.f UINT f_operand2; UINT f_u5; @@ -4190,7 +4190,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lsrr_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4219,7 +4219,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_lsrr_d_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_operand1; @@ -4248,7 +4248,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btst: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -4276,7 +4276,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_btstq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_asrq.f UINT f_operand2; UINT f_u5; @@ -4303,7 +4303,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_setf: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_setf.f UINT f_operand2; UINT f_operand1; @@ -4425,7 +4425,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcc_b: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_b.f UINT f_operand2; UINT f_disp9_lo; @@ -4461,7 +4461,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ba_b: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_b.f UINT f_disp9_lo; INT f_disp9_hi; @@ -4494,7 +4494,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bcc_w: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_w.f SI f_indir_pc__word_pcrel; UINT f_operand2; @@ -4523,7 +4523,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_ba_w: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bcc_w.f SI f_indir_pc__word_pcrel; /* Contents of trailing part of insn. */ @@ -4549,7 +4549,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jas_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f UINT f_operand2; UINT f_operand1; @@ -4577,7 +4577,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jas_c: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f INT f_indir_pc__dword; UINT f_operand2; @@ -4607,7 +4607,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jump_p: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand2; @@ -4631,7 +4631,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bas_c: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bas_c.f SI f_indir_pc__dword_pcrel; UINT f_operand2; @@ -4661,7 +4661,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_jasc_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_m_sprv32.f UINT f_operand2; UINT f_operand1; @@ -4689,7 +4689,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_break: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_break.f UINT f_u4; @@ -4712,7 +4712,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cb: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -4743,7 +4743,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cw: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -4774,7 +4774,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_bound_cd: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -4805,7 +4805,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_scc: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_move_spr_mv32.f UINT f_operand2; UINT f_operand1; @@ -4832,7 +4832,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addoq: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addoq.f UINT f_operand2; INT f_s8; @@ -4859,7 +4859,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_b_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -4891,7 +4891,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_w_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -4923,7 +4923,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_m_d_m: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_addc_m.f UINT f_operand2; UINT f_memmode; @@ -4955,7 +4955,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cb: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cb.f INT f_indir_pc__byte; UINT f_operand2; @@ -4985,7 +4985,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cw: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cw.f INT f_indir_pc__word; UINT f_operand2; @@ -5015,7 +5015,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addo_cd: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_bound_cd.f INT f_indir_pc__dword; UINT f_operand2; @@ -5045,7 +5045,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_addi_acr_b_r: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_muls_b.f UINT f_operand2; UINT f_operand1; @@ -5073,7 +5073,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_fidxi: { const IDESC *idesc = &crisv32f_insn_data[itype]; - CGEN_INSN_WORD insn = base_insn; + CGEN_INSN_WORD insn ATTRIBUTE_UNUSED = base_insn; #define FLD(f) abuf->fields.sfmt_mcp.f UINT f_operand1;