From patchwork Tue Dec 19 10:51:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 82453 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1B124386C583 for ; Tue, 19 Dec 2023 10:52:54 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp.gentoo.org (smtp.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id 32442386184F for ; Tue, 19 Dec 2023 10:52:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 32442386184F Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gentoo.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 32442386184F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:470:ea4a:1:5054:ff:fec7:86e4 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702983136; cv=none; b=TeVHejmU70ma49K+i8SVr+/UK5b0MFyaT/0dma8cIdnlmxGFnJQ7xRX8Ptr3TlcxaGToECuIODb6zJRiVZGQ2M0p7QO1+/NtDoHAczXhbLcqlbb0g5rA3500hGK6MsW2BpdhtO9VljFFUMJEvIHJBW1xykhWi1FM5Gfc02/65Xw= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702983136; c=relaxed/simple; bh=VRy16kJ7JVUNi1O67RQ8nliX/1MyVqtHp88bTMcGnis=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=UtS8gkBDYCNjwAWzCg5MzP9RNuuzgF6CptJLGHQDms+QM1N7jnK6cirtauRgZKrfXsk7KSgK1lIbuvcnLAPiDR/Nx1XdBfu50kKy35oQHCThTiRq0LcPLzeiPCAOPIUL3rG9fmpRRHTDLdAeTa7QC0YqLR+AEHEFbnJ95/7YU24= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by smtp.gentoo.org (Postfix, from userid 559) id D338A335DCC; Tue, 19 Dec 2023 10:52:14 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH/committed 08/21] sim: frv: fix -Wunused-variable warnings Date: Tue, 19 Dec 2023 05:51:42 -0500 Message-ID: <20231219105155.10433-8-vapier@gentoo.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231219105155.10433-1-vapier@gentoo.org> References: <20231219105155.10433-1-vapier@gentoo.org> MIME-Version: 1.0 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org --- sim/frv/cache.c | 6 +----- sim/frv/frv.c | 4 ---- sim/frv/interrupts.c | 3 +-- sim/frv/mloop.in | 1 - sim/frv/profile-fr500.c | 3 --- sim/frv/traps.c | 5 +---- 6 files changed, 3 insertions(+), 19 deletions(-) diff --git a/sim/frv/cache.c b/sim/frv/cache.c index b4f33f1252d5..c2beb39d3ef8 100644 --- a/sim/frv/cache.c +++ b/sim/frv/cache.c @@ -517,7 +517,6 @@ frv_cache_write (FRV_CACHE *cache, SI address, char *data, unsigned length) /* See if this data is already in the cache. */ SIM_CPU *current_cpu = cache->cpu; - USI hsr0 = GET_HSR0 (); FRV_CACHE_TAG *tag; int found; @@ -851,7 +850,7 @@ pipeline_requeue_request (FRV_CACHE_PIPELINE *p) static int next_priority (FRV_CACHE *cache, FRV_CACHE_PIPELINE *pipeline) { - int i, j; + int i; int pipe; int lowest = 0; FRV_CACHE_REQUEST *req; @@ -1155,7 +1154,6 @@ address_interference (FRV_CACHE *cache, SI address, FRV_CACHE_REQUEST *req, static void wait_for_WAR (FRV_CACHE* cache, int pipe, FRV_CACHE_REQUEST *req) { - FRV_CACHE_WAR war; FRV_CACHE_PIPELINE *pipeline = & cache->pipeline[pipe]; if (! cache->BARS.valid) @@ -1286,7 +1284,6 @@ static void handle_req_preload (FRV_CACHE *cache, int pipe, FRV_CACHE_REQUEST *req) { int found; - FRV_CACHE_WAR war; FRV_CACHE_TAG *tag; int length; int lock; @@ -1462,7 +1459,6 @@ handle_req_unlock (FRV_CACHE *cache, int pipe, FRV_CACHE_REQUEST *req) static void handle_req_WAR (FRV_CACHE *cache, int pipe, FRV_CACHE_REQUEST *req) { - char *buffer; FRV_CACHE_TAG *tag; SI address = req->address; diff --git a/sim/frv/frv.c b/sim/frv/frv.c index 676bc67950d6..c2f2f26b26df 100644 --- a/sim/frv/frv.c +++ b/sim/frv/frv.c @@ -656,8 +656,6 @@ spr_ccr_get_handler (SIM_CPU *current_cpu) void spr_ccr_set_handler (SIM_CPU *current_cpu, USI newval) { - int ccr = newval; - SET_H_ICCR (H_ICCR_ICC3, (newval >> 28) & 0xf); SET_H_ICCR (H_ICCR_ICC2, (newval >> 24) & 0xf); SET_H_ICCR (H_ICCR_ICC1, (newval >> 20) & 0xf); @@ -715,8 +713,6 @@ spr_cccr_get_handler (SIM_CPU *current_cpu) void spr_cccr_set_handler (SIM_CPU *current_cpu, USI newval) { - int cccr = newval; - SET_H_CCCR (H_CCCR_CC7, (newval >> 14) & 0x3); SET_H_CCCR (H_CCCR_CC6, (newval >> 12) & 0x3); SET_H_CCCR (H_CCCR_CC5, (newval >> 10) & 0x3); diff --git a/sim/frv/interrupts.c b/sim/frv/interrupts.c index a0145770f903..baf058f18d4a 100644 --- a/sim/frv/interrupts.c +++ b/sim/frv/interrupts.c @@ -390,7 +390,6 @@ frv_detect_insn_access_interrupts (SIM_CPU *current_cpu, SCACHE *sc) { const CGEN_INSN *insn = sc->argbuf.idesc->idata; - SIM_DESC sd = CPU_STATE (current_cpu); FRV_VLIW *vliw = CPU_VLIW (current_cpu); /* Check for vliw constraints. */ @@ -431,6 +430,7 @@ frv_detect_insn_access_interrupts (SIM_CPU *current_cpu, SCACHE *sc) /* Enter the halt state if FSR0.QNE is set and we are executing a floating point insn, a media insn or an insn which access a FR register. */ + SIM_DESC sd = CPU_STATE (current_cpu); SI fsr0 = GET_FSR (0); if (GET_FSR_QNE (fsr0) && (frv_is_float_insn (insn) || frv_is_media_insn (insn) @@ -808,7 +808,6 @@ set_exception_status_registers ( ) { struct frv_interrupt *interrupt = & frv_interrupt_table[item->kind]; - int slot = (item->vpc - previous_vliw_pc) / 4; int reg_index = -1; int set_ear = 0; int set_edr = 0; diff --git a/sim/frv/mloop.in b/sim/frv/mloop.in index 9209e83b593a..dc77f06651dc 100644 --- a/sim/frv/mloop.in +++ b/sim/frv/mloop.in @@ -139,7 +139,6 @@ static void { int i; - FRV_VLIW *vliw = CPU_VLIW (current_cpu); CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (current_cpu); /* Loop over the queued writes, executing them. Set the pc to the address diff --git a/sim/frv/profile-fr500.c b/sim/frv/profile-fr500.c index 0593aefd0dfb..cc992035da7e 100644 --- a/sim/frv/profile-fr500.c +++ b/sim/frv/profile-fr500.c @@ -2043,11 +2043,8 @@ frvbf_model_fr500_u_media (SIM_CPU *cpu, const IDESC *idesc, { int cycles; FRV_PROFILE_STATE *ps; - int is_media_s1; - int is_media_s2; int busy_adjustment[] = {0, 0, 0}; int *fr; - int *acc; if (model_insn == FRV_INSN_MODEL_PASS_1) return 0; diff --git a/sim/frv/traps.c b/sim/frv/traps.c index aee1f0e741ac..a5f3a2e2da2b 100644 --- a/sim/frv/traps.c +++ b/sim/frv/traps.c @@ -172,7 +172,7 @@ frv_itrap (SIM_CPU *current_cpu, PCADDR pc, USI base, SI offset) #if TRAPDUMP || (defined (TRAP_REGDUMP1)) || (defined (TRAP_REGDUMP2)) { char buf[256]; - int i, j; + int i; buf[0] = 0; if (STATE_TEXT_SECTION (sd) @@ -824,7 +824,6 @@ clear_ne_flags ( ) { SI NE_flags[2]; - int exception; GET_NE_FLAGS (NE_flags, NE_base); if (target_index >= 0) @@ -857,7 +856,6 @@ frvbf_clear_ne_flags (SIM_CPU *current_cpu, SI target_index, BI is_float) { int hi_available; int lo_available; - int exception; SI NE_base; USI necr; FRV_REGISTER_CONTROL *control; @@ -897,7 +895,6 @@ frvbf_commit (SIM_CPU *current_cpu, SI target_index, BI is_float) SI NE_base; SI NE_flags[2]; BI NE_flag; - int exception; int hi_available; int lo_available; USI necr;