From patchwork Wed Nov 29 20:33:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom de Vries X-Patchwork-Id: 80986 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 42304382DC54 for ; Wed, 29 Nov 2023 20:33:46 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp-out1.suse.de (smtp-out1.suse.de [IPv6:2a07:de40:b251:101:10:150:64:1]) by sourceware.org (Postfix) with ESMTPS id 1218C3857835 for ; Wed, 29 Nov 2023 20:33:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1218C3857835 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=suse.de Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=suse.de ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 1218C3857835 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a07:de40:b251:101:10:150:64:1 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701290011; cv=none; b=tjHd1wiqML9PuMkbXHP4ur8LF/D2thZ2+E+MTOel0DN0PKLiRwgpVN7/1Wcpc71w77mvsUE5ww9jRHuqrfp6ag2ebq5/zJEHfbkB2zHxHHvcx83BJEsOwTbutBRZA3uAmsF1fI3ALNE9QV8/MxqAoTNdLnxMr1A1sjeLl4evUcQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701290011; c=relaxed/simple; bh=I4BckcVJxlXujPK+bzRZNxxKEkyOfvxRqFWRP5t5j0U=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=Ro8k+CkHjKqK7DCiEWK9mP8mkh/nvzc0khjD1azuM6sM9OOQLLUMVwlS427ZbSmNvkuOIrk40mKufaAlxKUgycuk7oiAnRnIaIpZkDY4wwrDBRvpI4KkZIdLBvhjLHTjaLnwau7+3XaV3sBspS9w3+Q6H3SQNC0I8Es3blmcDJ4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 273AF219C5 for ; Wed, 29 Nov 2023 20:33:29 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 0E27E13AA7 for ; Wed, 29 Nov 2023 20:33:29 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id ENMBAhmgZ2U5QQAAD6G6ig (envelope-from ) for ; Wed, 29 Nov 2023 20:33:29 +0000 From: Tom de Vries To: gdb-patches@sourceware.org Subject: [RFC 3/4] [gdb/tdep] Enable prefer-software-single-stepping on amd64 Date: Wed, 29 Nov 2023 21:33:25 +0100 Message-Id: <20231129203326.11952-3-tdevries@suse.de> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20231129203326.11952-1-tdevries@suse.de> References: <20231129203326.11952-1-tdevries@suse.de> MIME-Version: 1.0 X-Spamd-Bar: +++++++++++++++ X-Spam-Score: 15.17 X-Rspamd-Server: rspamd1 Authentication-Results: smtp-out1.suse.de; dkim=none; spf=softfail (smtp-out1.suse.de: 2a07:de40:b281:104:10:150:64:97 is neither permitted nor denied by domain of tdevries@suse.de) smtp.mailfrom=tdevries@suse.de; dmarc=fail reason="No valid SPF, No valid DKIM" header.from=suse.de (policy=none) X-Rspamd-Queue-Id: 273AF219C5 X-Spamd-Result: default: False [15.17 / 50.00]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; FROM_HAS_DN(0.00)[]; R_MISSING_CHARSET(2.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; PREVIOUSLY_DELIVERED(0.00)[gdb-patches@sourceware.org]; BROKEN_CONTENT_TYPE(1.50)[]; R_SPF_SOFTFAIL(4.60)[~all:c]; RCPT_COUNT_ONE(0.00)[1]; RCVD_COUNT_THREE(0.00)[3]; TO_DN_NONE(0.00)[]; NEURAL_SPAM_SHORT(2.88)[0.960]; MX_GOOD(-0.01)[]; NEURAL_SPAM_LONG(3.50)[1.000]; MID_CONTAINS_FROM(1.00)[]; FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; R_DKIM_NA(2.20)[]; MIME_TRACE(0.00)[0:+]; RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%]; DMARC_POLICY_SOFTFAIL(0.10)[suse.de : No valid SPF, No valid DKIM,none] X-Spam: Yes X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Add amd64 support for prefer-software-single-stepping. The support is not complete (only non control-flow insns are supported), but it doesn't need to be since hardware single-stepping is used as fallback. Tested on x86_64-linux. --- gdb/amd64-tdep.c | 68 ++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 63 insertions(+), 5 deletions(-) diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c index 85721bbadf4..841b072c714 100644 --- a/gdb/amd64-tdep.c +++ b/gdb/amd64-tdep.c @@ -1194,7 +1194,7 @@ static const unsigned char twobyte_has_modrm[256] = { /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ }; -static int amd64_syscall_p (const struct amd64_insn *insn, int *lengthp); +static int amd64_syscall_with_length_p (const struct amd64_insn *insn, int *lengthp); static int rex_prefix_p (gdb_byte pfx) @@ -1514,7 +1514,7 @@ amd64_displaced_step_copy_insn (struct gdbarch *gdbarch, { int syscall_length; - if (amd64_syscall_p (details, &syscall_length)) + if (amd64_syscall_with_length_p (details, &syscall_length)) buf[details->opcode_offset + syscall_length] = NOP_OPCODE; } @@ -1623,11 +1623,28 @@ amd64_call_p (const struct amd64_insn *details) return 0; } +static int +amd64_cond_jmp_p (const struct amd64_insn *details) +{ + const gdb_byte *insn = &details->raw_insn[details->opcode_offset]; + + if (insn[0] >= 0x70 && insn[0] <= 0x7f) + return 1; + + if (insn[0] == 0xe3) + return 1; + + if (insn[0] == 0x0f && insn[1] >= 0x80 && insn[1] <= 0x8f) + return 1; + + return 0; +} + /* Return non-zero if INSN is a system call, and set *LENGTHP to its length in bytes. Otherwise, return zero. */ static int -amd64_syscall_p (const struct amd64_insn *details, int *lengthp) +amd64_syscall_with_length_p (const struct amd64_insn *details, int *lengthp) { const gdb_byte *insn = &details->raw_insn[details->opcode_offset]; @@ -1640,6 +1657,15 @@ amd64_syscall_p (const struct amd64_insn *details, int *lengthp) return 0; } +/* As amd64_syscall_with_length_p, but without the lengthp argument. */ + +static int +amd64_syscall_p (const struct amd64_insn *details) +{ + int dummy; + return amd64_syscall_with_length_p (details, &dummy); +} + /* Classify the instruction at ADDR using PRED. Throw an error if the memory can't be read. */ @@ -1683,6 +1709,18 @@ amd64_insn_is_jump (struct gdbarch *gdbarch, CORE_ADDR addr) return amd64_classify_insn_at (gdbarch, addr, amd64_jmp_p); } +static int +amd64_insn_is_cond_jump (struct gdbarch *gdbarch, CORE_ADDR addr) +{ + return amd64_classify_insn_at (gdbarch, addr, amd64_cond_jmp_p); +} + +static int +amd64_insn_is_syscall (struct gdbarch *gdbarch, CORE_ADDR addr) +{ + return amd64_classify_insn_at (gdbarch, addr, amd64_syscall_p); +} + /* Fix up the state of registers and memory after having single-stepped a displaced instruction. */ @@ -1748,7 +1786,7 @@ amd64_displaced_step_fixup (struct gdbarch *gdbarch, the instruction has put control where it belongs, and leave it unrelocated. Goodness help us if there are PC-relative system calls. */ - if (amd64_syscall_p (insn_details, &insn_len) + if (amd64_syscall_with_length_p (insn_details, &insn_len) /* GDB can get control back after the insn after the syscall. Presumably this is a kernel bug. Fixup ensures it's a nop, we add one to the length for it. */ @@ -3158,10 +3196,30 @@ amd64_in_indirect_branch_thunk (struct gdbarch *gdbarch, CORE_ADDR pc) AMD64_RIP_REGNUM); } +extern bool prefer_software_single_stepping; + static std::vector amd64_software_single_step (struct regcache *regcache) { - return {}; + if (!prefer_software_single_stepping) + return {}; + + struct gdbarch *gdbarch = regcache->arch (); + CORE_ADDR pc = regcache_read_pc (regcache); + + if (amd64_insn_is_call (gdbarch, pc)) + return {}; + else if (amd64_insn_is_ret (gdbarch, pc)) + return {}; + else if (amd64_insn_is_jump (gdbarch, pc)) + return {}; + else if (amd64_insn_is_cond_jump (gdbarch, pc)) + return {}; + else if (amd64_insn_is_syscall (gdbarch, pc)) + return {}; + + size_t len = gdb_insn_length (gdbarch, pc); + return { pc + len }; } static bool