From patchwork Wed Sep 27 16:15:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Marchi X-Patchwork-Id: 76787 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1FBEC38319FE for ; Wed, 27 Sep 2023 16:16:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1FBEC38319FE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1695831360; bh=jFnbY0jWVzCGQl9mFJsWM+EH4FWhipYNBNV9Bi1iNGw=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=HOq/cpwRICpNIcb6ZUmrWgwwoHfGE4VcwmO4sKjN5ya3GvfUlMAtJp9oiMMy0WTlJ 7qPqyDZuGrNk2Sz8EhqObDT6eW2I66I+90dgi2lGVKaCTecPnkP649l/hM2xKWxZIQ MR7wMCq3PUpdMnAKepctqVRpH9kPgK5m+AtkqsHQ= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp.polymtl.ca (smtp.polymtl.ca [132.207.4.11]) by sourceware.org (Postfix) with ESMTPS id 530733870C2A for ; Wed, 27 Sep 2023 16:15:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 530733870C2A Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id 38RGFQef011246 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 27 Sep 2023 12:15:31 -0400 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp.polymtl.ca 38RGFQef011246 Received: from simark.localdomain (modemcable238.237-201-24.mc.videotron.ca [24.201.237.238]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id 8EC351E092; Wed, 27 Sep 2023 12:15:26 -0400 (EDT) To: gdb-patches@sourceware.org Cc: John Baldwin , Simon Marchi Subject: [PATCH] gdb/x86: use size of XSAVE area of enabled features Date: Wed, 27 Sep 2023 12:15:22 -0400 Message-ID: <20230927161525.3546855-1-simon.marchi@polymtl.ca> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Wed, 27 Sep 2023 16:15:26 +0000 X-Spam-Status: No, score=-3188.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Simon Marchi via Gdb-patches From: Simon Marchi Reply-To: Simon Marchi Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Since commit b42405a1594 ("gdb: Update x86 Linux architectures to support XSAVE layouts."), the test gdb.base/gcore.exp fails on my AMD Ryzen 3700X machine: FAIL: gdb.base/gcore.exp: corefile restored all registers The test gets the register state (saves the output of "info all-registers"), saves a core with the "gcore" command, loads the core, and checks the register state against the one previously saved. The problem is that when reading registers from the core file, the last half of ymm registers is unavailable: (gdb) print $ymm0.v32_int8 $1 = {0, -77, -23, -9, -1, 127, 0, 0, 0, -77, -23, -9, -1, 127, 0, 0, } One strange thing with this machine is that the bitset of state components supported by XCR0 is 0x207, meaning "x87 | SSE | AVX | PKRU", but XCR0 at runtime is 0x7, meaning "x87 | SSE | AVX". So, PKRU appears to be supported by the processor, but disabled by the kernel. I didn't find why yet. From CPUID leaf EAX=0Dh, ECX=00h, GDB can get: - from EBX: max size of the XSAVE area required by features currently enabled in XCR0. On my machine, it's 0x340 (832). - from ECX: max size of the XSAVE area required by all features supported by XCR0. On my machine, it's 0x380 (896). At runtime, GDB uses ECX (max size required by all supported features) to fill the x86_xsave_layout::sizeof_xsave. So, when writing the core file note for the XSAVE state, it writes a note of size 896, even though it doesn't write the PKRU state. When loading back the core, GDB tries to figure out the layout of the XSAVE area based on what features are enabled in XCR0 and the size of the note (the size of the XSAVE area). Since my combination of XCR0 and size of XSAVE area doesn't match any combination known by GDB, GDB falls back to a gdbarch supporting only x87 and SSE. This patch changes GDB to populate the x86_xsave_layout::sizeof_xsave field (and consequently the size of the XSAVE state note in core files) using EBX, the size of the XSAVE area required by currently enabled features in XCR0. This makes i387_guess_xsave_layout recognize my case with this condition: else if (HAS_AVX (xcr0) && xsave_size == 832) { /* Intel and AMD CPUs supporting AVX. */ layout.avx_offset = 576; } In other words, just as if my machine didn't support PKRU at all. Another reason why I think this change makes sense is that XSAVE state notes in kernel-generated cores on this machine have size 832. So this change makes GDB-generated cores more similar to kernel-generated ones, reducing the diversity of XSAVE state notes that GDB needs to be able to figure out. Note that if PKRU was enabled on my machine, then the effective XSAVE area size would be 896 bytes. We would need to add a case in i387_guess_xsave_layout for that combination, since there is no currently. But I don't have a way to test that right now, since I don't know why PKRU is disabled. Change-Id: If64f30307f3a2e5ca3e1fd1cb7379ea840805a85 Reviewed-By: John Baldwin --- gdb/nat/x86-xstate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) base-commit: 4befded43f524d0840bb88fff7b77415b73a3851 diff --git a/gdb/nat/x86-xstate.c b/gdb/nat/x86-xstate.c index 9fdc572356ab..5ae014af4f49 100644 --- a/gdb/nat/x86-xstate.c +++ b/gdb/nat/x86-xstate.c @@ -42,11 +42,11 @@ xsave_feature_offset (uint64_t xcr0, int feature) int x86_xsave_length () { - uint32_t ecx; + uint32_t ebx; - if (!x86_cpuid_count (0xd, 0, nullptr, nullptr, &ecx, nullptr)) + if (!x86_cpuid_count (0xd, 0, nullptr, &ebx, nullptr, nullptr)) return 0; - return ecx; + return ebx; } /* See x86-xstate.h. */