From patchwork Wed Sep 13 10:18:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luis Machado X-Patchwork-Id: 75852 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B91683870F30 for ; Wed, 13 Sep 2023 10:19:58 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B91683870F30 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1694600398; bh=sUE+7q7NXT4aXJLDPDqeopTc4NWKreYAHbYwUt5WZkY=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=raS2Zwf7fKKM83pJOis84W7bYgexQZkAnwCxchT/UW1iQF/erVnK5QgiBBinWf5o7 lHW0VCCUHweDNED5qN9ezWynswDb1G8gNHSh/j9+k7sGXZ2adGvQhYohtM2dpS4lgm 2xuBer4gQXmd6y+DWvyinDXHvp8yZ8WR9eajhF18= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2041.outbound.protection.outlook.com [40.107.22.41]) by sourceware.org (Postfix) with ESMTPS id 063BD3858017 for ; Wed, 13 Sep 2023 10:18:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 063BD3858017 Received: from AM6PR10CA0093.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:209:8c::34) by DU2PR08MB10131.eurprd08.prod.outlook.com (2603:10a6:10:490::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.33; Wed, 13 Sep 2023 10:18:40 +0000 Received: from AM7EUR03FT034.eop-EUR03.prod.protection.outlook.com (2603:10a6:209:8c:cafe::d6) by AM6PR10CA0093.outlook.office365.com (2603:10a6:209:8c::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6792.19 via Frontend Transport; Wed, 13 Sep 2023 10:18:40 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT034.mail.protection.outlook.com (100.127.140.87) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6792.20 via Frontend Transport; Wed, 13 Sep 2023 10:18:40 +0000 Received: ("Tessian outbound d084e965c4eb:v175"); Wed, 13 Sep 2023 10:18:40 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 3b4b830296b5a873 X-CR-MTA-TID: 64aa7808 Received: from f4406e758ea6.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 1E37C3CC-0D30-4338-ACF1-D0583C1378A0.1; Wed, 13 Sep 2023 10:18:33 +0000 Received: from EUR03-AM7-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id f4406e758ea6.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Wed, 13 Sep 2023 10:18:33 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=WM28ytlv84pC0esecHdzQ5FoRYj3PigRwEQgckXVzlk8Zm+EYpEDoSRRvNHQCh4qBta4vP2rukXqQOE4GJt/krNGgBnQo6DoiWo+QibMmi6CJGKt4zp5OTx3tYrZOkG6lou8xVpZW76Mx4h95ETQi5LZ9P7kbp5H2UvDPZZnLEgcIAkpB/MxqyHAqmzUvbgPcxrDEwb0GBuKbaqwyFYCBzM9VmvXUe9hGnUduC0Mg4HAQJihfmfHeeBS3PSkSBsZhofHaJEbqgEI2vTimyomjW1wHlov5vZfu1wCgHWKDXISPMG55ziVQMNtxX/pyBiDGGb4CdQvKeyERrfYHbVcvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=sUE+7q7NXT4aXJLDPDqeopTc4NWKreYAHbYwUt5WZkY=; b=K4tMO2mdDyQ3FbAJr9QyBqJVW5BRpFVZoGnLgGAkcrJUaXlQPEQz9AkDt3ChfmyohR8BkYOVTXSBlAcBGmfryOGENw1LtXigo72aZSOJU5T3hT0+5pKJVsPS+DHlq9O43HhCYn6DrsHTMCft6NxCBf3tQ3NSEuZz+qOLRD6TZHG4yG7ynIIG0WFboQjYb4JPqRZe4/O2o5WJLSNnpNJW7N/oMtotaXNDQpSjp48HUcmQlhguzvFuUfMGUXLW+QoJFRmsI4k6MsAAcvzdmiiLmkOHh6uy8Mtq7u1j+ZCjrtSoe4VzjA8k+l2YkNCtz2pvb0D9f0zxJSUTtfb+L4g6zQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=sourceware.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none Received: from AS9PR05CA0258.eurprd05.prod.outlook.com (2603:10a6:20b:493::29) by AS8PR08MB6504.eurprd08.prod.outlook.com (2603:10a6:20b:336::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6792.19; Wed, 13 Sep 2023 10:18:30 +0000 Received: from AM7EUR03FT027.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:493:cafe::82) by AS9PR05CA0258.outlook.office365.com (2603:10a6:20b:493::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.37 via Frontend Transport; Wed, 13 Sep 2023 10:18:30 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT027.mail.protection.outlook.com (100.127.140.124) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6792.19 via Frontend Transport; Wed, 13 Sep 2023 10:18:30 +0000 Received: from AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Wed, 13 Sep 2023 10:18:30 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Wed, 13 Sep 2023 10:18:30 +0000 Received: from e129171.arm.com (10.57.66.200) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Wed, 13 Sep 2023 10:18:29 +0000 To: Subject: [PATCH v6 11/17] [gdb/aarch64] sme: Fixup sigframe gdbarch when vg/svg changes Date: Wed, 13 Sep 2023 11:18:09 +0100 Message-ID: <20230913101815.178154-12-luis.machado@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230913101815.178154-1-luis.machado@arm.com> References: <20230913101815.178154-1-luis.machado@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT027:EE_|AS8PR08MB6504:EE_|AM7EUR03FT034:EE_|DU2PR08MB10131:EE_ X-MS-Office365-Filtering-Correlation-Id: 1108d565-f6be-416c-2338-08dbb442ccfa x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: UZ1aKiFEOGH7rGq3I1CcwU1D23Gs9nbmnuUkFKJI/cflkX96VmzthAOXK+N0/h9Mjnh+Jzt/Q109S3olo1mVeP0JC/6Jpht6vfEkTOrjxubvJ4jInL16B0wObGWIl1fBel4L1hFREc6gtsEZrndOcluF7Ss5bx8XuzcKjywca3VXqGL++kuxpwOR+WdOyqu5eldFcJt82VK/lK+0qVkfp+QNLAZY9maK8bpMHZMzr1poWn+8JHGAwySiyjy6u/0aNqPCLhvy631WmuePdckvQy2QBbGnmulTio5l7DVDFb+pzFzASJeULASHJCjksdVBLHSpqJ66rfy/Jg9u0mTervYy9blfdcKgpowrhzK8373r+yrs8V2hkIU6jT0g/1RjoCyegLRqvvSlHgvDWzMdPVvxpBvph+VVMS5c2tWeIhKhuNGbpgx6yR2N7pDof3g/PtGhXv8OOLiWq0q+/zUns1Pkm5HcaRujB1e8OrE2nDTu2lRPGNnS5gXCOJp2IhE0mDs91mx1bfXvhqxa1/ipZ3Orf0XmMX2RgAG4sZtFdoQRJ2Tys7kz+0SUuMnJYdlDzrPgqRl20fhKDZoKUmJApMMhZEfcr6NE+5w9XDUBTdveX9TkAQSYVHMshLQjPzrnkAIkfZbmOpxxiVFe3b+b9rx3XvvtQkzBxpjO0rslCMLYNGvErkqwdLKyVa86I/oTMLZdbEY4Tpt9f7bjOYcDzePPOmk7eEWqIg8HU83h2Ar/l+GUXA3sUF8Ez6dEnZ0XVB8qxYYrfvcIu3KL+55jYg== X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:nebula.arm.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(396003)(346002)(136003)(376002)(39860400002)(1800799009)(186009)(82310400011)(451199024)(40470700004)(46966006)(36840700001)(66899024)(316002)(26005)(70586007)(70206006)(6916009)(54906003)(1076003)(2616005)(83380400001)(6666004)(7696005)(82740400003)(81166007)(86362001)(36860700001)(47076005)(40480700001)(356005)(40460700003)(426003)(478600001)(336012)(36756003)(30864003)(2906002)(8676002)(4326008)(41300700001)(8936002)(44832011)(5660300002)(36900700001); DIR:OUT; SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB6504 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT034.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 787438e3-044e-4d7d-f44c-08dbb442c758 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OiJpkjBKbObuALKV4ztCniCHJQ/ldyfZwNvbLMCSKVnevtiS6NxrfDl+GkXfE2WnBdZL5lzBv+LTM11nhevyZssGNv8hrpA0PvKNy1evumGFPm24QrUfA8t6hrtv8uhc7AA/BpC8JioTDRDguw2kD1rSDZoM2NDWg4mOXETcFh0KxoOsvxdyc1a5UUz8gGMxljpQUEntsowNhqIttTZ69/RW6D/JwXNtBBQb6VzuBHG263/ba3/9WOZMrdmxBSOHTxH6OyA7ivB9KyHRjJ+LgcRUmTAFrNrhIng4Ex2Onr4P+eCZ8UFmB8qp8/Z8yHdoEx1KSVC9XSoOaw+3nhTGq7rpVOUzryaW9y0uqw4zEcX6OAVmsgMcdJ2scBJcsckA8f9w9TqUNgiZVNUCPa+0OGwvJQykchke/tLPJxQL0cecksxFZCEv70CnPjh1ZG3NDYubjZ9cylUwZpwDg1XgRLPw1urcpXYy1CAzB2EiatNYGc3WSTV/mXleAUQW61IllmKl2yiJ/XZXMazjuPyi/BWGFGzSdtg1g4pzj1IkUdGDisB5XkZIXNndpOaIvIgL0aEh8poUKz5/+vOAQscJfCikRRhHEHlmh6d1i84Iw+9NvB8e2lwd3rcCHeVPSwUnhbMwajriJd41siDQCv6p3o2WrGyFNz0IUs+/Boh07rmt1WVzEE34OxLpTu7lMP7sgy2yO1dGuJtqWFixlxSklVgPCWtIpvVRVo700IsuQC8pgofcp1UQQJc9NAJUoKDT X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230031)(4636009)(346002)(136003)(39860400002)(376002)(396003)(451199024)(82310400011)(186009)(1800799009)(46966006)(40470700004)(36840700001)(7696005)(6666004)(107886003)(478600001)(1076003)(30864003)(426003)(2906002)(336012)(26005)(54906003)(6916009)(44832011)(70206006)(70586007)(41300700001)(2616005)(83380400001)(8676002)(5660300002)(8936002)(4326008)(40460700003)(36860700001)(47076005)(82740400003)(86362001)(40480700001)(36756003)(316002)(81166007)(66899024); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Sep 2023 10:18:40.2062 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1108d565-f6be-416c-2338-08dbb442ccfa X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT034.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR08MB10131 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Luis Machado via Gdb-patches From: Luis Machado Reply-To: Luis Machado Cc: thiago.bauermann@linaro.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Updates in v6: - Made gdb/tram-frame.h include gdb/frame-unwind.h for the function type. Updates in v4: - Addressed review comments --- With SME, where you have two different vector lengths (vl and svl), it may be the case that the current frame has a set of vector lengths (A) but the signal context has a distinct set of vector lengths (B). In this case, we may run into a situation where GDB attempts to use a gdbarch created for set A, but it is really dealing with a frame that was using set B. This is problematic, specially with SME, because now we have a different number of pseudo-registers and types that gets cached on creation of each gdbarch variation. For AArch64 we really need to be able to use the correct gdbarch for each frame, and I noticed the signal frame (tramp-frame) doesn't have a settable prev_arch field. So it ends up using the default frame_unwind_arch function and eventually calling get_frame_arch (next_frame). That means the previous frame will always have the same gdbarch as the current frame. This patch first refactors the AArch64/Linux signal context code, simplifying it and making it reusable for our purposes of calculating the previous frame's gdbarch. I introduced a struct that holds information that we have found in the signal context, and with which we can make various decisions. Finally, a small change to tramp-frame.c and tramp-frame.h to expose a prev_arch hook that the architecture can set. With this new field, AArch64/Linux can implement a hook that looks at the signal context and infers the gdbarch for the previous frame. Regression-tested on aarch64-linux Ubuntu 22.04/20.04. --- gdb/aarch64-linux-tdep.c | 278 +++++++++++++++++++++++++++------------ gdb/tramp-frame.c | 1 + gdb/tramp-frame.h | 5 + 3 files changed, 198 insertions(+), 86 deletions(-) diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c index f76d1888072..39855844ad0 100644 --- a/gdb/aarch64-linux-tdep.c +++ b/gdb/aarch64-linux-tdep.c @@ -184,6 +184,39 @@ #define AARCH64_SME_CONTEXT_SIZE(svq) \ (AARCH64_SME_CONTEXT_REGS_OFFSET + AARCH64_SME_CONTEXT_ZA_SIZE (svq)) +/* Holds information about the signal frame. */ +struct aarch64_linux_sigframe +{ + /* The stack pointer value. */ + CORE_ADDR sp = 0; + /* The sigcontext address. */ + CORE_ADDR sigcontext_address = 0; + /* The start/end signal frame section addresses. */ + CORE_ADDR section = 0; + CORE_ADDR section_end = 0; + + /* Starting address of the section containing the general purpose + registers. */ + CORE_ADDR gpr_section = 0; + /* Starting address of the section containing the FPSIMD registers. */ + CORE_ADDR fpsimd_section = 0; + /* Starting address of the section containing the SVE registers. */ + CORE_ADDR sve_section = 0; + /* Starting address of the section containing the ZA register. */ + CORE_ADDR za_section = 0; + /* Starting address of the section containing extra information. */ + CORE_ADDR extra_section = 0; + + /* The vector length (SVE or SSVE). */ + ULONGEST vl = 0; + /* The streaming vector length (SSVE/ZA). */ + ULONGEST svl = 0; + /* True if we are in streaming mode, false otherwise. */ + bool streaming_mode = false; + /* True if we have a ZA payload, false otherwise. */ + bool za_payload = false; +}; + /* Read an aarch64_ctx, returning the magic value, and setting *SIZE to the size, or return 0 on error. */ @@ -318,129 +351,115 @@ aarch64_linux_restore_vregs (struct gdbarch *gdbarch, } } -/* Implement the "init" method of struct tramp_frame. */ +/* Given a signal frame THIS_FRAME, read the signal frame information into + SIGNAL_FRAME. */ static void -aarch64_linux_sigframe_init (const struct tramp_frame *self, - frame_info_ptr this_frame, - struct trad_frame_cache *this_cache, - CORE_ADDR func) +aarch64_linux_read_signal_frame_info (frame_info_ptr this_frame, + struct aarch64_linux_sigframe &signal_frame) { - struct gdbarch *gdbarch = get_frame_arch (this_frame); - enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); - aarch64_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - CORE_ADDR sp = get_frame_register_unsigned (this_frame, AARCH64_SP_REGNUM); - CORE_ADDR sigcontext_addr = (sp + AARCH64_RT_SIGFRAME_UCONTEXT_OFFSET - + AARCH64_UCONTEXT_SIGCONTEXT_OFFSET ); - CORE_ADDR section = sigcontext_addr + AARCH64_SIGCONTEXT_RESERVED_OFFSET; - CORE_ADDR section_end = section + AARCH64_SIGCONTEXT_RESERVED_SIZE; - CORE_ADDR fpsimd = 0; - CORE_ADDR sve_regs = 0; - CORE_ADDR za_state = 0; - uint64_t svcr = 0; + signal_frame.sp = get_frame_register_unsigned (this_frame, AARCH64_SP_REGNUM); + signal_frame.sigcontext_address + = signal_frame.sp + AARCH64_RT_SIGFRAME_UCONTEXT_OFFSET + + AARCH64_UCONTEXT_SIGCONTEXT_OFFSET; + signal_frame.section + = signal_frame.sigcontext_address + AARCH64_SIGCONTEXT_RESERVED_OFFSET; + signal_frame.section_end + = signal_frame.section + AARCH64_SIGCONTEXT_RESERVED_SIZE; + + signal_frame.gpr_section + = signal_frame.sigcontext_address + AARCH64_SIGCONTEXT_XO_OFFSET; + + /* Search for all the other sections, stopping at null. */ + CORE_ADDR section = signal_frame.section; + CORE_ADDR section_end = signal_frame.section_end; uint32_t size, magic; - size_t vq = 0, svq = 0; bool extra_found = false; - int num_regs = gdbarch_num_regs (gdbarch); - - /* Read in the integer registers. */ + enum bfd_endian byte_order + = gdbarch_byte_order (get_frame_arch (this_frame)); - for (int i = 0; i < 31; i++) - { - trad_frame_set_reg_addr (this_cache, - AARCH64_X0_REGNUM + i, - sigcontext_addr + AARCH64_SIGCONTEXT_XO_OFFSET - + i * AARCH64_SIGCONTEXT_REG_SIZE); - } - trad_frame_set_reg_addr (this_cache, AARCH64_SP_REGNUM, - sigcontext_addr + AARCH64_SIGCONTEXT_XO_OFFSET - + 31 * AARCH64_SIGCONTEXT_REG_SIZE); - trad_frame_set_reg_addr (this_cache, AARCH64_PC_REGNUM, - sigcontext_addr + AARCH64_SIGCONTEXT_XO_OFFSET - + 32 * AARCH64_SIGCONTEXT_REG_SIZE); - - /* Search for the FP and SVE sections, stopping at null. */ while ((magic = read_aarch64_ctx (section, byte_order, &size)) != 0 && size != 0) { switch (magic) { case AARCH64_FPSIMD_MAGIC: - fpsimd = section; - section += size; - break; + { + signal_frame.fpsimd_section = section; + section += size; + break; + } case AARCH64_SVE_MAGIC: { /* Check if the section is followed by a full SVE dump, and set sve_regs if it is. */ gdb_byte buf[4]; - uint16_t flags; - - if (!tdep->has_sve ()) - break; + /* Extract the vector length. */ if (target_read_memory (section + AARCH64_SVE_CONTEXT_VL_OFFSET, buf, 2) != 0) { + warning (_("Failed to read the vector length from the SVE " + "signal frame context.")); section += size; break; } - vq = sve_vq_from_vl (extract_unsigned_integer (buf, 2, byte_order)); - /* If SME is supported, also read the flags field. It may - indicate if this SVE context is for streaming mode (SSVE). */ - if (tdep->has_sme ()) + signal_frame.vl = extract_unsigned_integer (buf, 2, byte_order); + + /* Extract the flags to check if we are in streaming mode. */ + if (target_read_memory (section + + AARCH64_SVE_CONTEXT_FLAGS_OFFSET, + buf, 2) != 0) { - if (target_read_memory (section - + AARCH64_SVE_CONTEXT_FLAGS_OFFSET, - buf, 2) != 0) - { - section += size; - break; - } - flags = extract_unsigned_integer (buf, 2, byte_order); - - /* Is this SSVE data? If so, enable the SM bit in SVCR. */ - if (flags & SVE_SIG_FLAG_SM) - svcr |= SVCR_SM_BIT; + warning (_("Failed to read the flags from the SVE signal frame" + " context.")); + section += size; + break; } - if (size >= AARCH64_SVE_CONTEXT_SIZE (vq)) - sve_regs = section + AARCH64_SVE_CONTEXT_REGS_OFFSET; + uint16_t flags = extract_unsigned_integer (buf, 2, byte_order); + /* Is this SSVE data? If so, we are in streaming mode. */ + signal_frame.streaming_mode + = (flags & SVE_SIG_FLAG_SM) ? true : false; + + ULONGEST vq = sve_vq_from_vl (signal_frame.vl); + if (size >= AARCH64_SVE_CONTEXT_SIZE (vq)) + { + signal_frame.sve_section + = section + AARCH64_SVE_CONTEXT_REGS_OFFSET; + } section += size; break; } case AARCH64_ZA_MAGIC: { - if (!tdep->has_sme ()) - { - section += size; - break; - } - /* Check if the section is followed by a full ZA dump, and set za_state if it is. */ gdb_byte buf[2]; + /* Extract the streaming vector length. */ if (target_read_memory (section + AARCH64_SME_CONTEXT_SVL_OFFSET, buf, 2) != 0) { + warning (_("Failed to read the streaming vector length from " + "ZA signal frame context.")); section += size; break; } - svq = sve_vq_from_vl (extract_unsigned_integer (buf, 2, - byte_order)); + + signal_frame.svl = extract_unsigned_integer (buf, 2, byte_order); + ULONGEST svq = sve_vq_from_vl (signal_frame.svl); if (size >= AARCH64_SME_CONTEXT_SIZE (svq)) { - za_state = section + AARCH64_SME_CONTEXT_REGS_OFFSET; - /* We have ZA data. Enable the ZA bit in SVCR. */ - svcr |= SVCR_ZA_BIT; + signal_frame.za_section + = section + AARCH64_SME_CONTEXT_REGS_OFFSET; + signal_frame.za_payload = true; } - section += size; break; } @@ -456,11 +475,14 @@ aarch64_linux_sigframe_init (const struct tramp_frame *self, if (target_read_memory (section + AARCH64_EXTRA_DATAP_OFFSET, buf, 8) != 0) { + warning (_("Failed to read the extra section address from the" + " signal frame context.")); section += size; break; } section = extract_unsigned_integer (buf, 8, byte_order); + signal_frame.extra_section = section; extra_found = true; break; } @@ -476,11 +498,48 @@ aarch64_linux_sigframe_init (const struct tramp_frame *self, if (!extra_found && section > section_end) break; } +} + +/* Implement the "init" method of struct tramp_frame. */ + +static void +aarch64_linux_sigframe_init (const struct tramp_frame *self, + frame_info_ptr this_frame, + struct trad_frame_cache *this_cache, + CORE_ADDR func) +{ + /* Read the signal context information. */ + struct aarch64_linux_sigframe signal_frame; + aarch64_linux_read_signal_frame_info (this_frame, signal_frame); + + /* Now we have all the data required to restore the registers from the + signal frame. */ + + /* Restore the general purpose registers. */ + CORE_ADDR offset = signal_frame.gpr_section; + for (int i = 0; i < 31; i++) + { + trad_frame_set_reg_addr (this_cache, AARCH64_X0_REGNUM + i, offset); + offset += AARCH64_SIGCONTEXT_REG_SIZE; + } + trad_frame_set_reg_addr (this_cache, AARCH64_SP_REGNUM, offset); + offset += AARCH64_SIGCONTEXT_REG_SIZE; + trad_frame_set_reg_addr (this_cache, AARCH64_PC_REGNUM, offset); - if (sve_regs != 0) + struct gdbarch *gdbarch = get_frame_arch (this_frame); + aarch64_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + /* Restore the SVE / FPSIMD registers. */ + if (tdep->has_sve () && signal_frame.sve_section != 0) { - CORE_ADDR offset; + ULONGEST vq = sve_vq_from_vl (signal_frame.vl); + CORE_ADDR sve_regs = signal_frame.sve_section; + + /* Restore VG. */ + trad_frame_set_reg_value (this_cache, AARCH64_SVE_VG_REGNUM, + sve_vg_from_vl (signal_frame.vl)); + int num_regs = gdbarch_num_regs (gdbarch); for (int i = 0; i < 32; i++) { offset = sve_regs + (i * vq * 16); @@ -510,30 +569,75 @@ aarch64_linux_sigframe_init (const struct tramp_frame *self, trad_frame_set_reg_addr (this_cache, AARCH64_SVE_FFR_REGNUM, offset); } - if (fpsimd != 0) + /* Restore the FPSIMD registers. */ + if (signal_frame.fpsimd_section != 0) { + CORE_ADDR fpsimd = signal_frame.fpsimd_section; + trad_frame_set_reg_addr (this_cache, AARCH64_FPSR_REGNUM, fpsimd + AARCH64_FPSIMD_FPSR_OFFSET); trad_frame_set_reg_addr (this_cache, AARCH64_FPCR_REGNUM, fpsimd + AARCH64_FPSIMD_FPCR_OFFSET); /* If there was no SVE section then set up the V registers. */ - if (sve_regs == 0) + if (!tdep->has_sve () || signal_frame.sve_section == 0) aarch64_linux_restore_vregs (gdbarch, this_cache, fpsimd); } - if (za_state != 0) + /* Restore the SME registers. */ + if (tdep->has_sme ()) { - /* Restore the ZA state. */ - trad_frame_set_reg_addr (this_cache, tdep->sme_za_regnum, - za_state); + if (signal_frame.za_section != 0) + { + /* Restore the ZA state. */ + trad_frame_set_reg_addr (this_cache, tdep->sme_za_regnum, + signal_frame.za_section); + } + + /* Restore/Reconstruct SVCR. */ + ULONGEST svcr = 0; + svcr |= signal_frame.za_payload ? SVCR_ZA_BIT : 0; + svcr |= signal_frame.streaming_mode ? SVCR_SM_BIT : 0; + trad_frame_set_reg_value (this_cache, tdep->sme_svcr_regnum, svcr); + + /* Restore SVG. */ + trad_frame_set_reg_value (this_cache, tdep->sme_svg_regnum, + sve_vg_from_vl (signal_frame.svl)); } - /* If SME is supported, set SVCR as well. */ - if (tdep->has_sme ()) - trad_frame_set_reg_value (this_cache, tdep->sme_svcr_regnum, svcr); + trad_frame_set_id (this_cache, frame_id_build (signal_frame.sp, func)); +} - trad_frame_set_id (this_cache, frame_id_build (sp, func)); +/* Implements the "prev_arch" method of struct tramp_frame. */ + +static struct gdbarch * +aarch64_linux_sigframe_prev_arch (frame_info_ptr this_frame, + void **frame_cache) +{ + struct trad_frame_cache *cache + = (struct trad_frame_cache *) *frame_cache; + + gdb_assert (cache != nullptr); + + struct aarch64_linux_sigframe signal_frame; + aarch64_linux_read_signal_frame_info (this_frame, signal_frame); + + /* The SVE vector length and the SME vector length may change from frame to + frame. Make sure we report the correct architecture to the previous + frame. + + We can reuse the next frame's architecture here, as it should be mostly + the same, except for potential different vg and svg values. */ + const struct target_desc *tdesc + = gdbarch_target_desc (get_frame_arch (this_frame)); + aarch64_features features = aarch64_features_from_target_desc (tdesc); + features.vq = sve_vq_from_vl (signal_frame.vl); + features.svq = (uint8_t) sve_vq_from_vl (signal_frame.svl); + + struct gdbarch_info info; + info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64); + info.target_desc = aarch64_read_description (features); + return gdbarch_find_by_info (info); } static const struct tramp_frame aarch64_linux_rt_sigframe = @@ -550,7 +654,9 @@ static const struct tramp_frame aarch64_linux_rt_sigframe = {0xd4000001, ULONGEST_MAX}, {TRAMP_SENTINEL_INSN, ULONGEST_MAX} }, - aarch64_linux_sigframe_init + aarch64_linux_sigframe_init, + nullptr, /* validate */ + aarch64_linux_sigframe_prev_arch, /* prev_arch */ }; /* Register maps. */ diff --git a/gdb/tramp-frame.c b/gdb/tramp-frame.c index c69ee6efc2c..94e42e9fec1 100644 --- a/gdb/tramp-frame.c +++ b/gdb/tramp-frame.c @@ -170,5 +170,6 @@ tramp_frame_prepend_unwinder (struct gdbarch *gdbarch, unwinder->stop_reason = default_frame_unwind_stop_reason; unwinder->this_id = tramp_frame_this_id; unwinder->prev_register = tramp_frame_prev_register; + unwinder->prev_arch = tramp_frame->prev_arch; frame_unwind_prepend_unwinder (gdbarch, unwinder); } diff --git a/gdb/tramp-frame.h b/gdb/tramp-frame.h index fa0241acb2d..0ab082dbc64 100644 --- a/gdb/tramp-frame.h +++ b/gdb/tramp-frame.h @@ -21,6 +21,7 @@ #define TRAMP_FRAME_H #include "frame.h" /* For "enum frame_type". */ +#include "frame-unwind.h" /* For frame_prev_arch_ftype. */ class frame_info_ptr; struct trad_frame_cache; @@ -75,6 +76,10 @@ struct tramp_frame int (*validate) (const struct tramp_frame *self, frame_info_ptr this_frame, CORE_ADDR *pc); + + /* Given the current frame in THIS_FRAME and a frame cache in FRAME_CACHE, + return the architecture of the previous frame. */ + frame_prev_arch_ftype *prev_arch; }; void tramp_frame_prepend_unwinder (struct gdbarch *gdbarch,