From patchwork Thu Nov 28 13:30:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Simon Marchi (Code Review)" X-Patchwork-Id: 36350 Received: (qmail 4028 invoked by alias); 28 Nov 2019 13:30:51 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 3993 invoked by uid 89); 28 Nov 2019 13:30:50 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT autolearn=ham version=3.3.1 spammy=routine X-HELO: mx1.osci.io Received: from polly.osci.io (HELO mx1.osci.io) (8.43.85.229) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 28 Nov 2019 13:30:38 +0000 Received: by mx1.osci.io (Postfix, from userid 994) id 0CC9620362; Thu, 28 Nov 2019 08:30:37 -0500 (EST) Received: from gnutoolchain-gerrit.osci.io (gnutoolchain-gerrit.osci.io [IPv6:2620:52:3:1:5054:ff:fe06:16ca]) by mx1.osci.io (Postfix) with ESMTP id 04F2B20172; Thu, 28 Nov 2019 08:30:26 -0500 (EST) Received: from localhost (localhost [127.0.0.1]) by gnutoolchain-gerrit.osci.io (Postfix) with ESMTP id CDF8B20AF6; Thu, 28 Nov 2019 08:30:26 -0500 (EST) X-Gerrit-PatchSet: 2 Date: Thu, 28 Nov 2019 08:30:26 -0500 From: "Luis Machado (Code Review)" To: Andrew Burgess , gdb-patches@sourceware.org Cc: Simon Marchi Auto-Submitted: auto-generated X-Gerrit-MessageType: newpatchset Subject: [review v2] [ARM, sim] Fix build error and warnings X-Gerrit-Change-Id: I21db699d3b61b2de8c44053e47be4387285af28f X-Gerrit-Change-Number: 726 X-Gerrit-ChangeURL: X-Gerrit-Commit: 964e859f7a54768149e0f6e38f482e5eb98b1fa2 In-Reply-To: References: Reply-To: luis.machado@linaro.org, simon.marchi@polymtl.ca, andrew.burgess@embecosm.com, gdb-patches@sourceware.org MIME-Version: 1.0 Content-Disposition: inline User-Agent: Gerrit/3.0.3-79-g83ff7f88f1 Message-Id: <20191128133026.CDF8B20AF6@gnutoolchain-gerrit.osci.io> Change URL: https://gnutoolchain-gerrit.osci.io/r/c/binutils-gdb/+/726 ...................................................................... [ARM, sim] Fix build error and warnings Newer GCC's have switched to -fno-common by default, and this breaks the build for the ARM sim, like this: binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:65: multiple definition of `DSPsc'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:134: first defined here binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:64: multiple definition of `DSPacc'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:133: first defined here binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:63: multiple definition of `DSPregs'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:132: first defined here I also noticed a few warnings due to mismatching types, as follows: binutils-gdb/sim/arm/wrapper.c:870:31: warning: passing argument 1 of ‘sim_target_parse_arg_array’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] sim_target_parse_arg_array (argv); binutils-gdb/sim/arm/wrapper.c:775:1: note: expected ‘char **’ but argument is of type ‘char * const*’ sim_target_parse_arg_array (char ** argv) The following patch fixes both of the above. sim/arm/ChangeLog: 2019-11-28 Luis Machado * armemu.c (isize): Move this declaration ... * arminit.c (isize): ... here. * wrapper.c: Include "maverick.h". (, ): Remove. (DSPregs): Make extern. (DSPacc): Likewise. (DSPsc): Likewise. (sim_create_inferior): Cast variables to proper type. (sim_open): Likewise. * maverick.c: Include "maverick.h". (, ): Move declarations to maverick.h and update comment. * maverick.h: New file. Signed-off-by: Luis Machado Change-Id: I21db699d3b61b2de8c44053e47be4387285af28f --- M sim/arm/armemu.c M sim/arm/arminit.c M sim/arm/maverick.c A sim/arm/maverick.h M sim/arm/wrapper.c 5 files changed, 56 insertions(+), 67 deletions(-) diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index 76f398b..3a72277 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -1140,10 +1140,6 @@ /* EMULATION of ARM6. */ -/* The PC pipeline value depends on whether ARM - or Thumb instructions are being executed. */ -ARMword isize; - ARMword #ifdef MODE32 ARMul_Emulate32 (ARMul_State * state) diff --git a/sim/arm/arminit.c b/sim/arm/arminit.c index 851d356..3a626c8 100644 --- a/sim/arm/arminit.c +++ b/sim/arm/arminit.c @@ -40,6 +40,10 @@ ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */ char ARMul_BitList[256]; /* number of bits in a byte table */ +/* The PC pipeline value depends on whether ARM + or Thumb instructions are being executed. */ +ARMword isize; + /***************************************************************************\ * Call this routine once to set up the emulator's tables. * \***************************************************************************/ diff --git a/sim/arm/maverick.c b/sim/arm/maverick.c index c112692..cbcf55b 100644 --- a/sim/arm/maverick.c +++ b/sim/arm/maverick.c @@ -19,6 +19,7 @@ #include "armdefs.h" #include "ansidecl.h" #include "armemu.h" +#include "maverick.h" /*#define CIRRUS_DEBUG 1 */ #if CIRRUS_DEBUG @@ -30,36 +31,9 @@ #define POS64(i) ( (~(i)) >> 63 ) #define NEG64(i) ( (i) >> 63 ) -/* Define Co-Processor instruction handlers here. */ - -/* Here's ARMulator's DSP definition. A few things to note: - 1) it has 16 64-bit registers and 4 72-bit accumulators - 2) you can only access its registers with MCR and MRC. */ - -/* We can't define these in here because this file might not be linked - unless the target is arm9e-*. They are defined in wrapper.c. - Eventually the simulator should be made to handle any coprocessor - at run time. */ -struct maverick_regs -{ - union - { - int i; - float f; - } upper; - - union - { - int i; - float f; - } lower; -}; - -union maverick_acc_regs -{ - long double ld; /* Acc registers are 72-bits. */ -}; - +/* These variables are defined here and made extern in wrapper.c for now. + Eventually the simulator should be made to handle any coprocessor at run + time. */ struct maverick_regs DSPregs[16]; union maverick_acc_regs DSPacc[4]; ARMword DSPsc; diff --git a/sim/arm/maverick.h b/sim/arm/maverick.h new file mode 100644 index 0000000..9e081a4 --- /dev/null +++ b/sim/arm/maverick.h @@ -0,0 +1,42 @@ +/* maverick.h -- Cirrus/DSP co-processor interface header + Copyright (C) 2003-2019 Free Software Foundation, Inc. + Contributed by Aldy Hernandez (aldyh@redhat.com). + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +/* Define Co-Processor instruction handlers here. */ + +/* Here's ARMulator's DSP definition. A few things to note: + 1) it has 16 64-bit registers and 4 72-bit accumulators + 2) you can only access its registers with MCR and MRC. */ + +struct maverick_regs +{ + union + { + int i; + float f; + } upper; + + union + { + int i; + float f; + } lower; +}; + +union maverick_acc_regs +{ + long double ld; /* Acc registers are 72-bits. */ +}; diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index fde5d8c..5c9eb9b9 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -37,6 +37,7 @@ #include "gdb/signals.h" #include "libiberty.h" #include "iwmmxt.h" +#include "maverick.h" /* TODO: This should get pulled from the SIM_DESC. */ host_callback *sim_callback; @@ -101,37 +102,9 @@ fprintf (stderr, " %*s\n", size, opbuf); } -/* Cirrus DSP registers. - - We need to define these registers outside of maverick.c because - maverick.c might not be linked in unless --target=arm9e-* in which - case wrapper.c will not compile because it tries to access Cirrus - registers. This should all go away once we get the Cirrus and ARM - Coprocessor to coexist in armcopro.c-- aldyh. */ - -struct maverick_regs -{ - union - { - int i; - float f; - } upper; - - union - { - int i; - float f; - } lower; -}; - -union maverick_acc_regs -{ - long double ld; /* Acc registers are 72-bits. */ -}; - -struct maverick_regs DSPregs[16]; -union maverick_acc_regs DSPacc[4]; -ARMword DSPsc; +extern struct maverick_regs DSPregs[16]; +extern union maverick_acc_regs DSPacc[4]; +extern ARMword DSPsc; static void init (void) @@ -236,7 +209,7 @@ { int argvlen = 0; int mach; - char **arg; + char * const *arg; init (); @@ -867,7 +840,7 @@ sim_callback = cb; - sim_target_parse_arg_array (argv); + sim_target_parse_arg_array ((char **) argv); if (argv[1] != NULL) {