From patchwork Mon Oct 7 21:28:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Tromey X-Patchwork-Id: 34859 Received: (qmail 54241 invoked by alias); 7 Oct 2019 21:28:23 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 54186 invoked by uid 89); 7 Oct 2019 21:28:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-19.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS autolearn=ham version=3.3.1 spammy=SIM, formulation, sk:microbl X-HELO: gateway24.websitewelcome.com Received: from gateway24.websitewelcome.com (HELO gateway24.websitewelcome.com) (192.185.51.251) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 07 Oct 2019 21:28:21 +0000 Received: from cm14.websitewelcome.com (cm14.websitewelcome.com [100.42.49.7]) by gateway24.websitewelcome.com (Postfix) with ESMTP id 8512015500 for ; Mon, 7 Oct 2019 16:28:19 -0500 (CDT) Received: from box5379.bluehost.com ([162.241.216.53]) by cmsmtp with SMTP id HaYFiKvZbBnGaHaYFiUGNJ; Mon, 07 Oct 2019 16:28:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=tromey.com; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Sender:Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=R8PX2/7r+YuOZBDkaKmyrqPG2JhntpmKJ9aV843H4Dc=; b=MPKtADBeUn11HgvRKy17vowSLu CX88q6nB8maFE0jWyTRiAt++SgwxMCN/wH+6XR//goKGP6vVbY0Fl6J7JglksYD3sE2QFukEo+mng clr8ng2Mi+IEZ6pzz1fKDgKw8; Received: from 174-29-53-230.hlrn.qwest.net ([174.29.53.230]:40208 helo=bapiya.Home) by box5379.bluehost.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256) (Exim 4.92) (envelope-from ) id 1iHaYF-002zo1-9a; Mon, 07 Oct 2019 15:28:19 -0600 From: Tom Tromey To: gdb-patches@sourceware.org Cc: Tom Tromey Subject: [PATCH 2/2] Fix opcodes includes Date: Mon, 7 Oct 2019 15:28:13 -0600 Message-Id: <20191007212813.12497-3-tom@tromey.com> In-Reply-To: <20191007212813.12497-1-tom@tromey.com> References: <20191007212813.12497-1-tom@tromey.com> Now that gdb can unconditionally use a -I pointing at the top of the source tree, we can remove the ugly "../opcodes/" formulation that was needed earlier. This patch adds the -I and cleans up these includes. 2019-10-07 Tom Tromey * arc-tdep.c: Remove ".." from include. * frv-tdep.c: Remove ".." from include. * lm32-tdep.c: Remove ".." from include. * microblaze-tdep.c: Remove ".." from include. * or1k-tdep.h: Remove ".." from include. * s12z-tdep.c: Remove ".." from include. * Makefile.in (OPCODES_CFLAGS): Add comment. (TOP_CFLAGS): New variable. (INTERNAL_CFLAGS_BASE): Add TOP_CFLAGS. --- gdb/ChangeLog | 12 ++++++++++++ gdb/Makefile.in | 6 +++++- gdb/arc-tdep.c | 2 +- gdb/frv-tdep.c | 2 +- gdb/lm32-tdep.c | 2 +- gdb/mep-tdep.c | 4 ++-- gdb/microblaze-tdep.c | 4 ++-- gdb/or1k-tdep.h | 4 ++-- gdb/s12z-tdep.c | 2 +- 9 files changed, 27 insertions(+), 11 deletions(-) diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 295639d0860..e29ac3c23a3 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -455,8 +455,12 @@ OPCODES = $(OPCODES_DIR)/libopcodes.a # Where are the other opcode tables which only have header file # versions? OP_INCLUDE = $(INCLUDE_DIR)/opcode +# See TOP_CFLAGS as well. OPCODES_CFLAGS = -I$(OP_INCLUDE) +# Allow includes like "opcodes/mumble.h". +TOP_CFLAGS = -I$(top_srcdir)/.. + # The simulator is usually nonexistent; targets that include one # should set this to list all the .o or .a files to be linked in. SIM = @SIM@ @@ -572,7 +576,7 @@ INTERNAL_CFLAGS_BASE = \ $(GDB_CFLAGS) $(OPCODES_CFLAGS) $(READLINE_CFLAGS) $(ZLIBINC) \ $(BFD_CFLAGS) $(INCLUDE_CFLAGS) $(LIBDECNUMBER_CFLAGS) \ $(INTL_CFLAGS) $(INCGNU) $(ENABLE_CFLAGS) $(INTERNAL_CPPFLAGS) \ - $(SRCHIGH_CFLAGS) + $(SRCHIGH_CFLAGS) $(TOP_CFLAGS) INTERNAL_WARN_CFLAGS = $(INTERNAL_CFLAGS_BASE) $(GDB_WARN_CFLAGS) INTERNAL_CFLAGS = $(INTERNAL_WARN_CFLAGS) $(GDB_WERROR_CFLAGS) diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c index 108b6717f7d..3faac0f2681 100644 --- a/gdb/arc-tdep.c +++ b/gdb/arc-tdep.c @@ -33,7 +33,7 @@ /* ARC header files. */ #include "opcode/arc.h" -#include "../opcodes/arc-dis.h" +#include "opcodes/arc-dis.h" #include "arc-tdep.h" /* Standard headers. */ diff --git a/gdb/frv-tdep.c b/gdb/frv-tdep.c index 804206bcb37..d869c20d0fc 100644 --- a/gdb/frv-tdep.c +++ b/gdb/frv-tdep.c @@ -29,7 +29,7 @@ #include "dis-asm.h" #include "sim-regno.h" #include "gdb/sim-frv.h" -#include "../opcodes/frv-desc.h" /* for the H_SPR_... enums */ +#include "opcodes/frv-desc.h" /* for the H_SPR_... enums */ #include "symtab.h" #include "elf-bfd.h" #include "elf/frv.h" diff --git a/gdb/lm32-tdep.c b/gdb/lm32-tdep.c index 1f746d250cd..088f0355bb8 100644 --- a/gdb/lm32-tdep.c +++ b/gdb/lm32-tdep.c @@ -35,7 +35,7 @@ #include "regcache.h" #include "trad-frame.h" #include "reggroups.h" -#include "../opcodes/lm32-desc.h" +#include "opcodes/lm32-desc.h" #include /* Macros to extract fields from an instruction. */ diff --git a/gdb/mep-tdep.c b/gdb/mep-tdep.c index 5b1d64c991c..4eccb455c03 100644 --- a/gdb/mep-tdep.c +++ b/gdb/mep-tdep.c @@ -48,8 +48,8 @@ /* Get the user's customized MeP coprocessor register names from libopcodes. */ -#include "../opcodes/mep-desc.h" -#include "../opcodes/mep-opc.h" +#include "opcodes/mep-desc.h" +#include "opcodes/mep-opc.h" /* The gdbarch_tdep structure. */ diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c index 1248acbdc9e..44bfe7f361e 100644 --- a/gdb/microblaze-tdep.c +++ b/gdb/microblaze-tdep.c @@ -34,8 +34,8 @@ #include "dwarf2-frame.h" #include "osabi.h" #include "target-descriptions.h" -#include "../opcodes/microblaze-opcm.h" -#include "../opcodes/microblaze-dis.h" +#include "opcodes/microblaze-opcm.h" +#include "opcodes/microblaze-dis.h" #include "microblaze-tdep.h" #include "remote.h" diff --git a/gdb/or1k-tdep.h b/gdb/or1k-tdep.h index e66c4a16c5f..fbd3e955137 100644 --- a/gdb/or1k-tdep.h +++ b/gdb/or1k-tdep.h @@ -23,8 +23,8 @@ #define TARGET_OR1K #endif -#include "../opcodes/or1k-desc.h" -#include "../opcodes/or1k-opc.h" +#include "opcodes/or1k-desc.h" +#include "opcodes/or1k-opc.h" /* General Purpose Registers */ #define OR1K_ZERO_REGNUM 0 diff --git a/gdb/s12z-tdep.c b/gdb/s12z-tdep.c index a1c085cfbb0..a9d20e809c1 100644 --- a/gdb/s12z-tdep.c +++ b/gdb/s12z-tdep.c @@ -30,7 +30,7 @@ #include "opcode/s12z.h" #include "trad-frame.h" #include "remote.h" -#include "../opcodes/s12z-opc.h" +#include "opcodes/s12z-opc.h" /* Two of the registers included in S12Z_N_REGISTERS are the CCH and CCL "registers" which are just views into