[2/2] Fix opcodes includes
Commit Message
Now that gdb can unconditionally use a -I pointing at the top of the
source tree, we can remove the ugly "../opcodes/" formulation that was
needed earlier. This patch adds the -I and cleans up these includes.
2019-10-07 Tom Tromey <tom@tromey.com>
* arc-tdep.c: Remove ".." from include.
* frv-tdep.c: Remove ".." from include.
* lm32-tdep.c: Remove ".." from include.
* microblaze-tdep.c: Remove ".." from include.
* or1k-tdep.h: Remove ".." from include.
* s12z-tdep.c: Remove ".." from include.
* Makefile.in (OPCODES_CFLAGS): Add comment.
(TOP_CFLAGS): New variable.
(INTERNAL_CFLAGS_BASE): Add TOP_CFLAGS.
---
gdb/ChangeLog | 12 ++++++++++++
gdb/Makefile.in | 6 +++++-
gdb/arc-tdep.c | 2 +-
gdb/frv-tdep.c | 2 +-
gdb/lm32-tdep.c | 2 +-
gdb/mep-tdep.c | 4 ++--
gdb/microblaze-tdep.c | 4 ++--
gdb/or1k-tdep.h | 4 ++--
gdb/s12z-tdep.c | 2 +-
9 files changed, 27 insertions(+), 11 deletions(-)
@@ -455,8 +455,12 @@ OPCODES = $(OPCODES_DIR)/libopcodes.a
# Where are the other opcode tables which only have header file
# versions?
OP_INCLUDE = $(INCLUDE_DIR)/opcode
+# See TOP_CFLAGS as well.
OPCODES_CFLAGS = -I$(OP_INCLUDE)
+# Allow includes like "opcodes/mumble.h".
+TOP_CFLAGS = -I$(top_srcdir)/..
+
# The simulator is usually nonexistent; targets that include one
# should set this to list all the .o or .a files to be linked in.
SIM = @SIM@
@@ -572,7 +576,7 @@ INTERNAL_CFLAGS_BASE = \
$(GDB_CFLAGS) $(OPCODES_CFLAGS) $(READLINE_CFLAGS) $(ZLIBINC) \
$(BFD_CFLAGS) $(INCLUDE_CFLAGS) $(LIBDECNUMBER_CFLAGS) \
$(INTL_CFLAGS) $(INCGNU) $(ENABLE_CFLAGS) $(INTERNAL_CPPFLAGS) \
- $(SRCHIGH_CFLAGS)
+ $(SRCHIGH_CFLAGS) $(TOP_CFLAGS)
INTERNAL_WARN_CFLAGS = $(INTERNAL_CFLAGS_BASE) $(GDB_WARN_CFLAGS)
INTERNAL_CFLAGS = $(INTERNAL_WARN_CFLAGS) $(GDB_WERROR_CFLAGS)
@@ -33,7 +33,7 @@
/* ARC header files. */
#include "opcode/arc.h"
-#include "../opcodes/arc-dis.h"
+#include "opcodes/arc-dis.h"
#include "arc-tdep.h"
/* Standard headers. */
@@ -29,7 +29,7 @@
#include "dis-asm.h"
#include "sim-regno.h"
#include "gdb/sim-frv.h"
-#include "../opcodes/frv-desc.h" /* for the H_SPR_... enums */
+#include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
#include "symtab.h"
#include "elf-bfd.h"
#include "elf/frv.h"
@@ -35,7 +35,7 @@
#include "regcache.h"
#include "trad-frame.h"
#include "reggroups.h"
-#include "../opcodes/lm32-desc.h"
+#include "opcodes/lm32-desc.h"
#include <algorithm>
/* Macros to extract fields from an instruction. */
@@ -48,8 +48,8 @@
/* Get the user's customized MeP coprocessor register names from
libopcodes. */
-#include "../opcodes/mep-desc.h"
-#include "../opcodes/mep-opc.h"
+#include "opcodes/mep-desc.h"
+#include "opcodes/mep-opc.h"
/* The gdbarch_tdep structure. */
@@ -34,8 +34,8 @@
#include "dwarf2-frame.h"
#include "osabi.h"
#include "target-descriptions.h"
-#include "../opcodes/microblaze-opcm.h"
-#include "../opcodes/microblaze-dis.h"
+#include "opcodes/microblaze-opcm.h"
+#include "opcodes/microblaze-dis.h"
#include "microblaze-tdep.h"
#include "remote.h"
@@ -23,8 +23,8 @@
#define TARGET_OR1K
#endif
-#include "../opcodes/or1k-desc.h"
-#include "../opcodes/or1k-opc.h"
+#include "opcodes/or1k-desc.h"
+#include "opcodes/or1k-opc.h"
/* General Purpose Registers */
#define OR1K_ZERO_REGNUM 0
@@ -30,7 +30,7 @@
#include "opcode/s12z.h"
#include "trad-frame.h"
#include "remote.h"
-#include "../opcodes/s12z-opc.h"
+#include "opcodes/s12z-opc.h"
/* Two of the registers included in S12Z_N_REGISTERS are
the CCH and CCL "registers" which are just views into