From patchwork Fri Jul 26 12:50:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pedro Franco de Carvalho X-Patchwork-Id: 33807 Received: (qmail 77857 invoked by alias); 26 Jul 2019 12:50:31 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 77782 invoked by uid 89); 26 Jul 2019 12:50:31 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-18.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 26 Jul 2019 12:50:28 +0000 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x6QCl2Mo062083 for ; Fri, 26 Jul 2019 08:50:25 -0400 Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0b-001b2d01.pphosted.com with ESMTP id 2u00mmuxjd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 26 Jul 2019 08:50:24 -0400 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id x6QCnala019181 for ; Fri, 26 Jul 2019 12:50:23 GMT Received: from b03cxnp07028.gho.boulder.ibm.com (b03cxnp07028.gho.boulder.ibm.com [9.17.130.15]) by ppma02dal.us.ibm.com with ESMTP id 2tymfdrv8m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 26 Jul 2019 12:50:23 +0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x6QCoK5q52363742 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 26 Jul 2019 12:50:20 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 276D0BE056; Fri, 26 Jul 2019 12:50:20 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AD18FBE068; Fri, 26 Jul 2019 12:50:19 +0000 (GMT) Received: from pedro.localdomain (unknown [9.80.227.78]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Fri, 26 Jul 2019 12:50:19 +0000 (GMT) Received: by pedro.localdomain (Postfix, from userid 1000) id 71EAA3C09B9; Fri, 26 Jul 2019 09:50:16 -0300 (-03) From: Pedro Franco de Carvalho To: gdb-patches@sourceware.org Cc: uweigand@de.ibm.com Subject: [PATCH 2/3] [PowerPC] Move up some register access routines Date: Fri, 26 Jul 2019 09:50:11 -0300 Message-Id: <20190726125012.6503-3-pedromfc@linux.ibm.com> In-Reply-To: <20190726125012.6503-1-pedromfc@linux.ibm.com> References: <20190726125012.6503-1-pedromfc@linux.ibm.com> MIME-Version: 1.0 Keep the routines related to register access grouped together. gdb/ChangeLog: YYYY-MM-DD Pedro Franco de Carvalho * ppc-linux-nat.c (ppc_linux_nat_target::store_registers) (ppc_linux_nat_target::auxv_parse) (ppc_linux_nat_target::read_description) (supply_gregset, fill_gregset, supply_fpregset, fill_fpregset): Move up. --- gdb/ppc-linux-nat.c | 334 ++++++++++++++++++++++---------------------- 1 file changed, 167 insertions(+), 167 deletions(-) diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c index deb31d4989..4be593b384 100644 --- a/gdb/ppc-linux-nat.c +++ b/gdb/ppc-linux-nat.c @@ -1555,6 +1555,173 @@ store_ppc_registers (const struct regcache *regcache, int tid) function to fail most of the time, so we ignore them. */ } +void +ppc_linux_nat_target::store_registers (struct regcache *regcache, int regno) +{ + pid_t tid = get_ptrace_pid (regcache->ptid ()); + + if (regno >= 0) + store_register (regcache, tid, regno); + else + store_ppc_registers (regcache, tid); +} + +/* Functions for transferring registers between a gregset_t or fpregset_t + (see sys/ucontext.h) and gdb's regcache. The word size is that used + by the ptrace interface, not the current program's ABI. Eg. if a + powerpc64-linux gdb is being used to debug a powerpc32-linux app, we + read or write 64-bit gregsets. This is to suit the host libthread_db. */ + +void +supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) +{ + const struct regset *regset = ppc_linux_gregset (sizeof (long)); + + ppc_supply_gregset (regset, regcache, -1, gregsetp, sizeof (*gregsetp)); +} + +void +fill_gregset (const struct regcache *regcache, + gdb_gregset_t *gregsetp, int regno) +{ + const struct regset *regset = ppc_linux_gregset (sizeof (long)); + + if (regno == -1) + memset (gregsetp, 0, sizeof (*gregsetp)); + ppc_collect_gregset (regset, regcache, regno, gregsetp, sizeof (*gregsetp)); +} + +void +supply_fpregset (struct regcache *regcache, const gdb_fpregset_t * fpregsetp) +{ + const struct regset *regset = ppc_linux_fpregset (); + + ppc_supply_fpregset (regset, regcache, -1, + fpregsetp, sizeof (*fpregsetp)); +} + +void +fill_fpregset (const struct regcache *regcache, + gdb_fpregset_t *fpregsetp, int regno) +{ + const struct regset *regset = ppc_linux_fpregset (); + + ppc_collect_fpregset (regset, regcache, regno, + fpregsetp, sizeof (*fpregsetp)); +} + +int +ppc_linux_nat_target::auxv_parse (gdb_byte **readptr, + gdb_byte *endptr, CORE_ADDR *typep, + CORE_ADDR *valp) +{ + int tid = inferior_ptid.lwp (); + if (tid == 0) + tid = inferior_ptid.pid (); + + int sizeof_auxv_field = ppc_linux_target_wordsize (tid); + + enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ()); + gdb_byte *ptr = *readptr; + + if (endptr == ptr) + return 0; + + if (endptr - ptr < sizeof_auxv_field * 2) + return -1; + + *typep = extract_unsigned_integer (ptr, sizeof_auxv_field, byte_order); + ptr += sizeof_auxv_field; + *valp = extract_unsigned_integer (ptr, sizeof_auxv_field, byte_order); + ptr += sizeof_auxv_field; + + *readptr = ptr; + return 1; +} + +const struct target_desc * +ppc_linux_nat_target::read_description () +{ + int tid = inferior_ptid.lwp (); + if (tid == 0) + tid = inferior_ptid.pid (); + + if (have_ptrace_getsetevrregs) + { + struct gdb_evrregset_t evrregset; + + if (ptrace (PTRACE_GETEVRREGS, tid, 0, &evrregset) >= 0) + return tdesc_powerpc_e500l; + + /* EIO means that the PTRACE_GETEVRREGS request isn't supported. + Anything else needs to be reported. */ + else if (errno != EIO) + perror_with_name (_("Unable to fetch SPE registers")); + } + + struct ppc_linux_features features = ppc_linux_no_features; + + features.wordsize = ppc_linux_target_wordsize (tid); + + CORE_ADDR hwcap = linux_get_hwcap (current_top_target ()); + CORE_ADDR hwcap2 = linux_get_hwcap2 (current_top_target ()); + + if (have_ptrace_getsetvsxregs + && (hwcap & PPC_FEATURE_HAS_VSX)) + { + gdb_vsxregset_t vsxregset; + + if (ptrace (PTRACE_GETVSXREGS, tid, 0, &vsxregset) >= 0) + features.vsx = true; + + /* EIO means that the PTRACE_GETVSXREGS request isn't supported. + Anything else needs to be reported. */ + else if (errno != EIO) + perror_with_name (_("Unable to fetch VSX registers")); + } + + if (have_ptrace_getvrregs + && (hwcap & PPC_FEATURE_HAS_ALTIVEC)) + { + gdb_vrregset_t vrregset; + + if (ptrace (PTRACE_GETVRREGS, tid, 0, &vrregset) >= 0) + features.altivec = true; + + /* EIO means that the PTRACE_GETVRREGS request isn't supported. + Anything else needs to be reported. */ + else if (errno != EIO) + perror_with_name (_("Unable to fetch AltiVec registers")); + } + + if (hwcap & PPC_FEATURE_CELL) + features.cell = true; + + features.isa205 = ppc_linux_has_isa205 (hwcap); + + if ((hwcap2 & PPC_FEATURE2_DSCR) + && check_regset (tid, NT_PPC_PPR, PPC_LINUX_SIZEOF_PPRREGSET) + && check_regset (tid, NT_PPC_DSCR, PPC_LINUX_SIZEOF_DSCRREGSET)) + { + features.ppr_dscr = true; + if ((hwcap2 & PPC_FEATURE2_ARCH_2_07) + && (hwcap2 & PPC_FEATURE2_TAR) + && (hwcap2 & PPC_FEATURE2_EBB) + && check_regset (tid, NT_PPC_TAR, PPC_LINUX_SIZEOF_TARREGSET) + && check_regset (tid, NT_PPC_EBB, PPC_LINUX_SIZEOF_EBBREGSET) + && check_regset (tid, NT_PPC_PMU, PPC_LINUX_SIZEOF_PMUREGSET)) + { + features.isa207 = true; + if ((hwcap2 & PPC_FEATURE2_HTM) + && check_regset (tid, NT_PPC_TM_SPR, + PPC_LINUX_SIZEOF_TM_SPRREGSET)) + features.htm = true; + } + } + + return ppc_linux_match_description (features); +} + /* The cached DABR value, to install in new threads. This variable is used when the PowerPC HWDEBUG ptrace interface is not available. */ @@ -2507,173 +2674,6 @@ ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr, CORE_ADDR mask return 2; } -void -ppc_linux_nat_target::store_registers (struct regcache *regcache, int regno) -{ - pid_t tid = get_ptrace_pid (regcache->ptid ()); - - if (regno >= 0) - store_register (regcache, tid, regno); - else - store_ppc_registers (regcache, tid); -} - -/* Functions for transferring registers between a gregset_t or fpregset_t - (see sys/ucontext.h) and gdb's regcache. The word size is that used - by the ptrace interface, not the current program's ABI. Eg. if a - powerpc64-linux gdb is being used to debug a powerpc32-linux app, we - read or write 64-bit gregsets. This is to suit the host libthread_db. */ - -void -supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) -{ - const struct regset *regset = ppc_linux_gregset (sizeof (long)); - - ppc_supply_gregset (regset, regcache, -1, gregsetp, sizeof (*gregsetp)); -} - -void -fill_gregset (const struct regcache *regcache, - gdb_gregset_t *gregsetp, int regno) -{ - const struct regset *regset = ppc_linux_gregset (sizeof (long)); - - if (regno == -1) - memset (gregsetp, 0, sizeof (*gregsetp)); - ppc_collect_gregset (regset, regcache, regno, gregsetp, sizeof (*gregsetp)); -} - -void -supply_fpregset (struct regcache *regcache, const gdb_fpregset_t * fpregsetp) -{ - const struct regset *regset = ppc_linux_fpregset (); - - ppc_supply_fpregset (regset, regcache, -1, - fpregsetp, sizeof (*fpregsetp)); -} - -void -fill_fpregset (const struct regcache *regcache, - gdb_fpregset_t *fpregsetp, int regno) -{ - const struct regset *regset = ppc_linux_fpregset (); - - ppc_collect_fpregset (regset, regcache, regno, - fpregsetp, sizeof (*fpregsetp)); -} - -int -ppc_linux_nat_target::auxv_parse (gdb_byte **readptr, - gdb_byte *endptr, CORE_ADDR *typep, - CORE_ADDR *valp) -{ - int tid = inferior_ptid.lwp (); - if (tid == 0) - tid = inferior_ptid.pid (); - - int sizeof_auxv_field = ppc_linux_target_wordsize (tid); - - enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ()); - gdb_byte *ptr = *readptr; - - if (endptr == ptr) - return 0; - - if (endptr - ptr < sizeof_auxv_field * 2) - return -1; - - *typep = extract_unsigned_integer (ptr, sizeof_auxv_field, byte_order); - ptr += sizeof_auxv_field; - *valp = extract_unsigned_integer (ptr, sizeof_auxv_field, byte_order); - ptr += sizeof_auxv_field; - - *readptr = ptr; - return 1; -} - -const struct target_desc * -ppc_linux_nat_target::read_description () -{ - int tid = inferior_ptid.lwp (); - if (tid == 0) - tid = inferior_ptid.pid (); - - if (have_ptrace_getsetevrregs) - { - struct gdb_evrregset_t evrregset; - - if (ptrace (PTRACE_GETEVRREGS, tid, 0, &evrregset) >= 0) - return tdesc_powerpc_e500l; - - /* EIO means that the PTRACE_GETEVRREGS request isn't supported. - Anything else needs to be reported. */ - else if (errno != EIO) - perror_with_name (_("Unable to fetch SPE registers")); - } - - struct ppc_linux_features features = ppc_linux_no_features; - - features.wordsize = ppc_linux_target_wordsize (tid); - - CORE_ADDR hwcap = linux_get_hwcap (current_top_target ()); - CORE_ADDR hwcap2 = linux_get_hwcap2 (current_top_target ()); - - if (have_ptrace_getsetvsxregs - && (hwcap & PPC_FEATURE_HAS_VSX)) - { - gdb_vsxregset_t vsxregset; - - if (ptrace (PTRACE_GETVSXREGS, tid, 0, &vsxregset) >= 0) - features.vsx = true; - - /* EIO means that the PTRACE_GETVSXREGS request isn't supported. - Anything else needs to be reported. */ - else if (errno != EIO) - perror_with_name (_("Unable to fetch VSX registers")); - } - - if (have_ptrace_getvrregs - && (hwcap & PPC_FEATURE_HAS_ALTIVEC)) - { - gdb_vrregset_t vrregset; - - if (ptrace (PTRACE_GETVRREGS, tid, 0, &vrregset) >= 0) - features.altivec = true; - - /* EIO means that the PTRACE_GETVRREGS request isn't supported. - Anything else needs to be reported. */ - else if (errno != EIO) - perror_with_name (_("Unable to fetch AltiVec registers")); - } - - if (hwcap & PPC_FEATURE_CELL) - features.cell = true; - - features.isa205 = ppc_linux_has_isa205 (hwcap); - - if ((hwcap2 & PPC_FEATURE2_DSCR) - && check_regset (tid, NT_PPC_PPR, PPC_LINUX_SIZEOF_PPRREGSET) - && check_regset (tid, NT_PPC_DSCR, PPC_LINUX_SIZEOF_DSCRREGSET)) - { - features.ppr_dscr = true; - if ((hwcap2 & PPC_FEATURE2_ARCH_2_07) - && (hwcap2 & PPC_FEATURE2_TAR) - && (hwcap2 & PPC_FEATURE2_EBB) - && check_regset (tid, NT_PPC_TAR, PPC_LINUX_SIZEOF_TARREGSET) - && check_regset (tid, NT_PPC_EBB, PPC_LINUX_SIZEOF_EBBREGSET) - && check_regset (tid, NT_PPC_PMU, PPC_LINUX_SIZEOF_PMUREGSET)) - { - features.isa207 = true; - if ((hwcap2 & PPC_FEATURE2_HTM) - && check_regset (tid, NT_PPC_TM_SPR, - PPC_LINUX_SIZEOF_TM_SPRREGSET)) - features.htm = true; - } - } - - return ppc_linux_match_description (features); -} - void _initialize_ppc_linux_nat (void) {