From patchwork Fri Jul 5 09:45:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Hayward X-Patchwork-Id: 33602 Received: (qmail 129011 invoked by alias); 5 Jul 2019 09:45:58 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 128925 invoked by uid 89); 5 Jul 2019 09:45:58 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-23.9 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS autolearn=ham version=3.3.1 spammy= X-HELO: EUR02-AM5-obe.outbound.protection.outlook.com Received: from mail-eopbgr00088.outbound.protection.outlook.com (HELO EUR02-AM5-obe.outbound.protection.outlook.com) (40.107.0.88) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 05 Jul 2019 09:45:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ywsMja42gDeDeQ071WWRVZAxaBDtDqpYpPOCbruoUDo=; b=QW1I5R0UIR6jDeVTUCAsG8r30kOGDBjXchv0vQttbMB+d2Eg/2L+tiGLcfbxAtGYAKSAcsKW/n2juk26wmda3L7s+zPe0bd02fOEZRh3o7DlpG9GUL//wS+sd11ucWz1So1rLbXMq+2jyeOpZ4HcH1COxYxLiOS+S+LmUB0B2yw= Received: from VI1PR08CA0147.eurprd08.prod.outlook.com (10.175.229.25) by DB8PR08MB4954.eurprd08.prod.outlook.com (20.179.15.204) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2052.18; Fri, 5 Jul 2019 09:45:46 +0000 Received: from AM5EUR03FT056.eop-EUR03.prod.protection.outlook.com (2a01:111:f400:7e08::202) by VI1PR08CA0147.outlook.office365.com (2603:10a6:800:d5::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2052.18 via Frontend Transport; Fri, 5 Jul 2019 09:45:46 +0000 Authentication-Results: spf=temperror (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; sourceware.org; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; sourceware.org; dmarc=temperror action=none header.from=arm.com; Received-SPF: TempError (protection.outlook.com: error in processing during lookup of arm.com: DNS Timeout) Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM5EUR03FT056.mail.protection.outlook.com (10.152.17.224) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2052.18 via Frontend Transport; Fri, 5 Jul 2019 09:45:44 +0000 Received: ("Tessian outbound 86cdd11d53e6:v23"); Fri, 05 Jul 2019 09:45:43 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 0f8239738d045584 X-CR-MTA-TID: 64aa7808 Received: from 7ecfcbd9f912.11 (cr-mta-lb-1.cr-mta-net [104.47.13.53]) by 64aa7808-outbound-1.mta.getcheckrecipient.com id DA6A6C63-B899-4E41-80EA-93B0309A2B93.1; Fri, 05 Jul 2019 09:45:37 +0000 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04lp2053.outbound.protection.outlook.com [104.47.13.53]) by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 7ecfcbd9f912.11 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384); Fri, 05 Jul 2019 09:45:37 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ywsMja42gDeDeQ071WWRVZAxaBDtDqpYpPOCbruoUDo=; b=QW1I5R0UIR6jDeVTUCAsG8r30kOGDBjXchv0vQttbMB+d2Eg/2L+tiGLcfbxAtGYAKSAcsKW/n2juk26wmda3L7s+zPe0bd02fOEZRh3o7DlpG9GUL//wS+sd11ucWz1So1rLbXMq+2jyeOpZ4HcH1COxYxLiOS+S+LmUB0B2yw= Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com (10.172.227.22) by DB6PR0802MB2472.eurprd08.prod.outlook.com (10.172.251.20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2032.20; Fri, 5 Jul 2019 09:45:34 +0000 Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::259b:8edf:fb65:2760]) by DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::259b:8edf:fb65:2760%8]) with mapi id 15.20.2052.010; Fri, 5 Jul 2019 09:45:34 +0000 From: Alan Hayward To: "gdb-patches@sourceware.org" CC: nd , Alan Hayward Subject: [PATCH 3/7] Arm: Add read_description read funcs and use in GDB Date: Fri, 5 Jul 2019 09:45:34 +0000 Message-ID: <20190705094525.51536-4-alan.hayward@arm.com> References: <20190705094525.51536-1-alan.hayward@arm.com> In-Reply-To: <20190705094525.51536-1-alan.hayward@arm.com> Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; X-Microsoft-Antispam-Untrusted: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:DB6PR0802MB2472; X-MS-Exchange-PUrlCount: 1 x-checkrecipientrouted: true x-ms-oob-tlc-oobclassifiers: OLM:6430;OLM:6430; X-Forefront-Antispam-Report-Untrusted: SFV:NSPM; SFS:(10009020)(4636009)(376002)(396003)(366004)(346002)(39860400002)(136003)(189003)(199004)(68736007)(73956011)(44832011)(5660300002)(66946007)(66446008)(305945005)(66556008)(478600001)(6116002)(6916009)(25786009)(446003)(30864003)(2906002)(3846002)(2616005)(50226002)(476003)(486006)(64756008)(66476007)(7736002)(2351001)(8936002)(86362001)(36756003)(53936002)(53946003)(102836004)(4326008)(52116002)(81156014)(26005)(256004)(6306002)(14454004)(76176011)(6512007)(6436002)(186003)(6486002)(81166006)(8676002)(1076003)(2501003)(71190400001)(316002)(11346002)(99286004)(14444005)(54906003)(66066001)(5640700003)(6506007)(5024004)(386003)(71200400001)(72206003)(2004002); DIR:OUT; SFP:1101; SCL:1; SRVR:DB6PR0802MB2472; H:DB6PR0802MB2133.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info-Original: g90l+WK+RxkUpupYFUQ5xCIm4IZ+K1brVTVA1EfqwJlyfPqljX2QG9oPZlhXn3en6HlDDxvQWMtxDOk+FTjXfFo9MLIHdQKEfQms3H00NVl0MHhJy3D/Dr5gIeOGnCt9cmWrt/fBSZJv9RJVEXzB45oRNKXe/y5Dw3a8dYF4TJaIPOyBH0p0M3BuytIBgPWYLRDfBjl96FczO+KmavMsPFnTwZdQTyAMemBjnFvA0z5dkVzOVnFajB2wULzIchzIxK+c8edM7aUzd1VVwlXnNoV1QH/z1jJvzY4ds0qAwsVX8n9pKeZJ+fhSSDNUDsyKtWbRh33UJjYRJN8PBwKylQhgYqg2q8lsZDBHhgUq9zWG9jmnL81CydkyGejr7hyptTL/4Jn2aK4ODMvmxNJE7fyVTwOeWh1iBbIWntFw9zQ= MIME-Version: 1.0 Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; Return-Path: Alan.Hayward@arm.com X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM5EUR03FT056.eop-EUR03.prod.protection.outlook.com X-MS-Office365-Filtering-Correlation-Id-Prvs: 56795141-b51a-4526-d6f3-08d7012d8694 X-IsSubscribed: yes Switch the Arm target to get target descriptions via arm_read_description and aarch32_read_description, in the same style as other feature targets. Add an enum to specify the different types - this will also be of use to gdbserver in a later patch. Call arm_create_mprofile_target_description directly as these will only be called the once, therefore they do not need caching. Under the hood return the same existing pre-feature target descriptions. Note: This commit will break the AArch64 gdbserver build. 2019-07-05 Alan Hayward * Makefile.in: Add new files. * aarch32-tdep.c: New file. * aarch32-tdep.h: New file. * aarch64-linux-nat.c (aarch64_linux_nat_target::read_description): Call aarch32_read_description. * arch/aarch32.c: New file. * arch/aarch32.h: New file. * arch/arm.c (arm_create_target_description) (arm_create_mprofile_target_description): New function. * arch/arm.h (arm_fp_type, arm_m_profile_type): New enum. (arm_create_target_description) (arm_create_mprofile_target_description): New declaration. * arm-fbsd-tdep.c (arm_fbsd_read_description_auxv): Call read_description functions. * arm-linux-nat.c (arm_linux_nat_target::read_description): Likewise. * arm-linux-tdep.c (arm_linux_core_read_description): Likewise. * arm-tdep.c (tdesc_arm_list): New variable. (arm_register_g_packet_guesses): Call create description functions. (arm_read_description): New function. * arm-tdep.h (arm_read_description): Add declaration. * configure.tgt: Add new files. --- gdb/Makefile.in | 5 ++++ gdb/aarch32-tdep.c | 33 +++++++++++++++++++++++++ gdb/aarch32-tdep.h | 25 +++++++++++++++++++ gdb/aarch64-linux-nat.c | 6 ++--- gdb/arch/aarch32.c | 29 ++++++++++++++++++++++ gdb/arch/aarch32.h | 27 ++++++++++++++++++++ gdb/arch/arm.c | 55 +++++++++++++++++++++++++++++++++++++++++ gdb/arch/arm.h | 27 ++++++++++++++++++++ gdb/arm-fbsd-tdep.c | 11 +++++---- gdb/arm-linux-nat.c | 11 +++++---- gdb/arm-linux-tdep.c | 11 +++++---- gdb/arm-tdep.c | 34 ++++++++++++++++++++++--- gdb/arm-tdep.h | 8 ++---- gdb/configure.tgt | 8 +++--- 14 files changed, 259 insertions(+), 31 deletions(-) create mode 100644 gdb/aarch32-tdep.c create mode 100644 gdb/aarch32-tdep.h create mode 100644 gdb/arch/aarch32.c create mode 100644 gdb/arch/aarch32.h diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 7308ea5767..9352dd92ff 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -665,7 +665,9 @@ ALL_64_TARGET_OBS = \ # All other target-dependent objects files (used with --enable-targets=all). ALL_TARGET_OBS = \ + aarch32-tdep.o \ arc-tdep.o \ + arch/aarch32.o \ arch/arm.o \ arch/arm-get-next-pcs.o \ arch/arm-linux.o \ @@ -1184,6 +1186,7 @@ SFILES = \ # right, it is probably easiest just to list .h files here directly. HFILES_NO_SRCDIR = \ + aarch32-tdep.h \ aarch64-ravenscar-thread.h \ aarch64-tdep.h \ ada-lang.h \ @@ -1431,6 +1434,7 @@ HFILES_NO_SRCDIR = \ xtensa-tdep.h \ arch/aarch64.h \ arch/aarch64-insn.h \ + arch/aarch32.h \ arch/arm.h \ arch/i386.h \ arch/ppc-linux-common.h \ @@ -2133,6 +2137,7 @@ force_update: MAKEOVERRIDES = ALLDEPFILES = \ + aarch32-tdep.c \ aarch64-fbsd-nat.c \ aarch64-fbsd-tdep.c \ aarch64-linux-nat.c \ diff --git a/gdb/aarch32-tdep.c b/gdb/aarch32-tdep.c new file mode 100644 index 0000000000..d9355d0665 --- /dev/null +++ b/gdb/aarch32-tdep.c @@ -0,0 +1,33 @@ +/* Copyright (C) 2019 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "common/common-defs.h" +#include "common/common-regcache.h" +#include "arch/aarch32.h" + +struct target_desc *tdesc_aarch32; + +/* See linux-aarch32-tdep.h. */ + +const target_desc * +aarch32_read_description () +{ + if (tdesc_aarch32 == nullptr) + tdesc_aarch32 = aarch32_create_target_description (); + + return tdesc_aarch32; +} diff --git a/gdb/aarch32-tdep.h b/gdb/aarch32-tdep.h new file mode 100644 index 0000000000..7fcea0adb9 --- /dev/null +++ b/gdb/aarch32-tdep.h @@ -0,0 +1,25 @@ +/* Copyright (C) 2019 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef AARCH32_TDEP_H +#define AARCH32_TDEP_H + +/* Get the AArch32 target description. */ + +const target_desc *aarch32_read_description (); + +#endif /* aarch32-tdep.h. */ diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 7b60a9a0c3..4db0288e68 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -27,9 +27,11 @@ #include "target-descriptions.h" #include "auxv.h" #include "gdbcmd.h" +#include "arch/arm.h" #include "aarch64-tdep.h" #include "aarch64-linux-tdep.h" #include "aarch32-linux-nat.h" +#include "aarch32-tdep.h" #include "arch/arm.h" #include "nat/aarch64-linux.h" #include "nat/aarch64-linux-hw-point.h" @@ -631,8 +633,6 @@ aarch64_linux_nat_target::post_attach (int pid) linux_nat_target::post_attach (pid); } -extern struct target_desc *tdesc_arm_with_neon; - /* Implement the "read_description" target_ops method. */ const struct target_desc * @@ -649,7 +649,7 @@ aarch64_linux_nat_target::read_description () ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); if (ret == 0) - return tdesc_arm_with_neon; + return aarch32_read_description (); CORE_ADDR hwcap = linux_get_hwcap (this); diff --git a/gdb/arch/aarch32.c b/gdb/arch/aarch32.c new file mode 100644 index 0000000000..f3cb8c7855 --- /dev/null +++ b/gdb/arch/aarch32.c @@ -0,0 +1,29 @@ +/* Copyright (C) 2019 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "common/common-defs.h" +#include "aarch32.h" + +extern struct target_desc *tdesc_arm_with_neon; + +/* See aarch32.h. */ + +target_desc * +aarch32_create_target_description () +{ + return tdesc_arm_with_neon; +} diff --git a/gdb/arch/aarch32.h b/gdb/arch/aarch32.h new file mode 100644 index 0000000000..87b28c0040 --- /dev/null +++ b/gdb/arch/aarch32.h @@ -0,0 +1,27 @@ +/* Copyright (C) 2019 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef ARCH_AARCH32_H +#define ARCH_AARCH32_H + +#include "common/tdesc.h" + +/* Create the AArch32 target description. */ + +target_desc *aarch32_create_target_description (); + +#endif /* aarch32.h. */ diff --git a/gdb/arch/arm.c b/gdb/arch/arm.c index 93738f0a0f..37806753cb 100644 --- a/gdb/arch/arm.c +++ b/gdb/arch/arm.c @@ -21,6 +21,15 @@ #include "common/common-regcache.h" #include "arm.h" +extern struct target_desc *tdesc_arm_with_vfpv2; +extern struct target_desc *tdesc_arm_with_vfpv3; +extern struct target_desc *tdesc_arm_with_iwmmxt; +#ifndef GDBSERVER +extern struct target_desc *tdesc_arm_with_m; +extern struct target_desc *tdesc_arm_with_m_vfp_d16; +extern struct target_desc *tdesc_arm_with_m_fpa_layout; +#endif + /* See arm.h. */ int @@ -372,3 +381,49 @@ shifted_reg_val (struct regcache *regcache, unsigned long inst, return res & 0xffffffff; } + +/* See arch/arm.h. */ + +target_desc * +arm_create_target_description (arm_fp_type fp_type) +{ + switch (fp_type) + { + case ARM_FP_TYPE_NONE: + return nullptr; + + case ARM_FP_TYPE_VFPV2: + return tdesc_arm_with_vfpv2; + + case ARM_FP_TYPE_VFPV3: + return tdesc_arm_with_vfpv3; + + case ARM_FP_TYPE_IWMMXT: + return tdesc_arm_with_iwmmxt; + + default: + error (_("Invalid Arm FP type: %d"), fp_type); + } +} + +/* See arch/arm.h. */ + +target_desc * +arm_create_mprofile_target_description (arm_m_profile_type m_type) +{ + switch (m_type) + { +#ifndef GDBSERVER + case ARM_M_TYPE_M_PROFILE: + return tdesc_arm_with_m; + + case ARM_M_TYPE_VFP_D16: + return tdesc_arm_with_m_fpa_layout; + + case ARM_M_TYPE_WITH_FPA: + return tdesc_arm_with_m_vfp_d16; +#endif + default: + error (_("Invalid Arm M type: %d"), m_type); + } +} diff --git a/gdb/arch/arm.h b/gdb/arch/arm.h index dfbbd56d28..f4cac9c15b 100644 --- a/gdb/arch/arm.h +++ b/gdb/arch/arm.h @@ -19,6 +19,8 @@ #ifndef ARCH_ARM_H #define ARCH_ARM_H +#include "common/tdesc.h" + /* Register numbers of various important registers. */ enum gdb_regnum { @@ -66,6 +68,23 @@ enum arm_breakpoint_kinds ARM_BP_KIND_ARM = 4, }; +/* Supported Arm FP hardware types. */ +enum arm_fp_type { + ARM_FP_TYPE_NONE = 0, + ARM_FP_TYPE_VFPV2, + ARM_FP_TYPE_VFPV3, + ARM_FP_TYPE_IWMMXT, + ARM_FP_TYPE_INVALID +}; + +/* Supported M-profile Arm types. */ +enum arm_m_profile_type { + ARM_M_TYPE_M_PROFILE, + ARM_M_TYPE_VFP_D16, + ARM_M_TYPE_WITH_FPA, + ARM_M_TYPE_INVALID +}; + /* Instruction condition field values. */ #define INST_EQ 0x0 #define INST_NE 0x1 @@ -165,4 +184,12 @@ unsigned long shifted_reg_val (struct regcache *regcache, unsigned long pc_val, unsigned long status_reg); +/* Create an Arm target description with the given FP hardware type. */ + +target_desc *arm_create_target_description (arm_fp_type fp_type); + +/* Create an Arm M-profile target description with the given hardware type. */ + +target_desc *arm_create_mprofile_target_description (arm_m_profile_type m_type); + #endif /* ARCH_ARM_H */ diff --git a/gdb/arm-fbsd-tdep.c b/gdb/arm-fbsd-tdep.c index dea3abbdd3..398c95ce0e 100644 --- a/gdb/arm-fbsd-tdep.c +++ b/gdb/arm-fbsd-tdep.c @@ -20,6 +20,7 @@ #include "defs.h" #include "elf/common.h" +#include "aarch32-tdep.h" #include "arm-tdep.h" #include "arm-fbsd-tdep.h" #include "auxv.h" @@ -178,20 +179,20 @@ arm_fbsd_read_description_auxv (struct target_ops *target) CORE_ADDR arm_hwcap = 0; if (target_auxv_search (target, AT_FREEBSD_HWCAP, &arm_hwcap) != 1) - return NULL; + return nullptr; if (arm_hwcap & HWCAP_VFP) { if (arm_hwcap & HWCAP_NEON) - return tdesc_arm_with_neon; + return aarch32_read_description (); else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPD32)) == (HWCAP_VFPv3 | HWCAP_VFPD32)) - return tdesc_arm_with_vfpv3; + return arm_read_description (ARM_FP_TYPE_VFPV3); else - return tdesc_arm_with_vfpv2; + return arm_read_description (ARM_FP_TYPE_VFPV2); } - return NULL; + return nullptr; } /* Implement the "core_read_description" gdbarch method. */ diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c index fe8a113a27..6a374bbc74 100644 --- a/gdb/arm-linux-nat.c +++ b/gdb/arm-linux-nat.c @@ -27,6 +27,7 @@ #include "observable.h" #include "gdbthread.h" +#include "aarch32-tdep.h" #include "arm-tdep.h" #include "arm-linux-tdep.h" #include "aarch32-linux-nat.h" @@ -551,7 +552,7 @@ arm_linux_nat_target::read_description () } if (arm_hwcap & HWCAP_IWMMXT) - return tdesc_arm_with_iwmmxt; + return arm_read_description (ARM_FP_TYPE_IWMMXT); if (arm_hwcap & HWCAP_VFP) { @@ -566,11 +567,11 @@ arm_linux_nat_target::read_description () /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support Neon with VFPv3-D32. */ if (arm_hwcap & HWCAP_NEON) - return tdesc_arm_with_neon; + return aarch32_read_description (); else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) - return tdesc_arm_with_vfpv3; - else - return tdesc_arm_with_vfpv2; + return arm_read_description (ARM_FP_TYPE_VFPV3); + + return arm_read_description (ARM_FP_TYPE_VFPV2); } return this->beneath ()->read_description (); diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c index d846749e0b..aec20877d9 100644 --- a/gdb/arm-linux-tdep.c +++ b/gdb/arm-linux-tdep.c @@ -33,6 +33,7 @@ #include "auxv.h" #include "xml-syscall.h" +#include "aarch32-tdep.h" #include "arch/arm.h" #include "arch/arm-get-next-pcs.h" #include "arch/arm-linux.h" @@ -738,14 +739,14 @@ arm_linux_core_read_description (struct gdbarch *gdbarch, /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support Neon with VFPv3-D32. */ if (arm_hwcap & HWCAP_NEON) - return tdesc_arm_with_neon; + return aarch32_read_description (); else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) - return tdesc_arm_with_vfpv3; - else - return tdesc_arm_with_vfpv2; + return arm_read_description (ARM_FP_TYPE_VFPV3); + + return arm_read_description (ARM_FP_TYPE_VFPV2); } - return NULL; + return nullptr; } diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 8e3607cdea..f3f6458a27 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -240,6 +240,9 @@ static const char **valid_disassembly_styles; /* Disassembly style to use. Default to "std" register names. */ static const char *disassembly_style; +/* All possible arm target descriptors. */ +struct target_desc *tdesc_arm_list[ARM_FP_TYPE_INVALID]; + /* This is used to keep the bfd arch_info in sync with the disassembly style. */ static void set_disassembly_style_sfunc (const char *, int, @@ -8763,7 +8766,6 @@ arm_register_reggroup_p (struct gdbarch *gdbarch, int regnum, return default_register_reggroup_p (gdbarch, regnum, group); } - /* For backward-compatibility we allow two 'g' packet lengths with the remote protocol depending on whether FPA registers are supplied. M-profile targets do not have FPA registers, but some @@ -8777,21 +8779,29 @@ arm_register_g_packet_guesses (struct gdbarch *gdbarch) { if (gdbarch_tdep (gdbarch)->is_m) { + const target_desc *tdesc; + + /* This function is only called the once, therefore it's safe to call the + tdesc creation function directly. */ + /* If we know from the executable this is an M-profile target, cater for remote targets whose register set layout is the same as the FPA layout. */ + tdesc = arm_create_mprofile_target_description (ARM_M_TYPE_WITH_FPA); register_remote_g_packet_guess (gdbarch, ARM_CORE_REGS_SIZE + ARM_FP_REGS_SIZE, - tdesc_arm_with_m_fpa_layout); + tdesc); /* The regular M-profile layout. */ + tdesc = arm_create_mprofile_target_description (ARM_M_TYPE_M_PROFILE); register_remote_g_packet_guess (gdbarch, ARM_CORE_REGS_SIZE, - tdesc_arm_with_m); + tdesc); /* M-profile plus M4F VFP. */ + tdesc = arm_create_mprofile_target_description (ARM_M_TYPE_VFP_D16); register_remote_g_packet_guess (gdbarch, ARM_CORE_REGS_SIZE + ARM_VFP2_REGS_SIZE, - tdesc_arm_with_m_vfp_d16); + tdesc); } /* Otherwise we don't have a useful guess. */ @@ -13336,3 +13346,19 @@ arm_process_record (struct gdbarch *gdbarch, struct regcache *regcache, return ret; } + +/* See arm-tdep.h. */ + +const target_desc * +arm_read_description (arm_fp_type fp_type) +{ + struct target_desc *tdesc = tdesc_arm_list[fp_type]; + + if (tdesc == nullptr) + { + tdesc = arm_create_target_description (fp_type); + tdesc_arm_list[fp_type] = tdesc; + } + + return tdesc; +} diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h index 807849a5ff..0107936894 100644 --- a/gdb/arm-tdep.h +++ b/gdb/arm-tdep.h @@ -281,11 +281,7 @@ extern void void *cb_data, const struct regcache *regcache); -/* Target descriptions. */ -extern struct target_desc *tdesc_arm_with_m; -extern struct target_desc *tdesc_arm_with_iwmmxt; -extern struct target_desc *tdesc_arm_with_vfpv2; -extern struct target_desc *tdesc_arm_with_vfpv3; -extern struct target_desc *tdesc_arm_with_neon; +/* Get the correct target description with given FP hardware type. */ +const target_desc *arm_read_description (arm_fp_type fp_type); #endif /* arm-tdep.h */ diff --git a/gdb/configure.tgt b/gdb/configure.tgt index 27f122ad04..7c0215e89a 100644 --- a/gdb/configure.tgt +++ b/gdb/configure.tgt @@ -48,8 +48,9 @@ amd64_tobjs="amd64-tdep.o arch/amd64.o ${x86_tobjs}" case "${targ}" in aarch64*-*-*) - cpu_obs="aarch64-tdep.o arch/aarch64-insn.o arch/aarch64.o \ - ravenscar-thread.o aarch64-ravenscar-thread.o";; + cpu_obs="aarch32-tdep.o aarch64-tdep.o arch/aarch32.o \ + arch/aarch64-insn.o arch/aarch64.o ravenscar-thread.o \ + aarch64-ravenscar-thread.o";; alpha*-*-*) # Target: Alpha @@ -62,7 +63,8 @@ arc*-*-*) ;; arm*-*-*) - cpu_obs="arch/arm.o arch/arm-get-next-pcs.o arm-tdep.o";; + cpu_obs="aarch32-tdep.o arch/aarch32.o arch/arm.o \ + arch/arm-get-next-pcs.o arm-tdep.o";; hppa*-*-*) # Target: HP PA-RISC