From patchwork Fri Apr 12 10:45:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Hayward X-Patchwork-Id: 32269 Received: (qmail 61237 invoked by alias); 12 Apr 2019 10:45:59 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 60980 invoked by uid 89); 12 Apr 2019 10:45:46 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-24.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, MIME_BASE64_BLANKS, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.1 spammy=UD:xml, elem, UD:gdbtypes.h, gdbtypesh X-HELO: EUR02-AM5-obe.outbound.protection.outlook.com Received: from mail-eopbgr00086.outbound.protection.outlook.com (HELO EUR02-AM5-obe.outbound.protection.outlook.com) (40.107.0.86) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 12 Apr 2019 10:45:22 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=hv6BDyspcukpDUwWprmMB+wmo/okUkOXd9fRmmU5sK4=; b=ZIc1Djebn0iTbvZDI/QlLJUhCupbB1vqPiiAu4l/QBvtFVkhlseoOLsFsTMyJ7YK+VfExtrqih+9ajEep5SCmBdj5IB2ym74YNy71jRNurG9cAgEGSPCW79p/z3q79za6qTMMPQRl1SGkkvxEj3zbWGjCANpj0F7uUlUL32l4xY= Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com (10.172.227.22) by DB6PR0802MB2279.eurprd08.prod.outlook.com (10.172.228.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1792.14; Fri, 12 Apr 2019 10:45:07 +0000 Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::399b:3a32:bff9:827e]) by DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::399b:3a32:bff9:827e%10]) with mapi id 15.20.1771.016; Fri, 12 Apr 2019 10:45:07 +0000 From: Alan Hayward To: "gdb-patches@sourceware.org" CC: nd , Alan Hayward Subject: [PATCH] AArch64: Add half float view to V registers Date: Fri, 12 Apr 2019 10:45:07 +0000 Message-ID: <20190412104504.30403-1-alan.hayward@arm.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 MIME-Version: 1.0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-IsSubscribed: yes AArch64 can fill the vector registers with half precision floats. Add a view for this. Add builtin type ieee half and connect this to the existing floatformats_ieee_half. gdb/ChangeLog: 2019-04-12 Alan Hayward * aarch64-tdep.c (aarch64_vnh_type): Add half view. (aarch64_vnv_type): Likewise. * target-descriptions.c (make_gdb_type): Add TDESC_TYPE_IEEE_HALF. * common/tdesc.c: Likewise. * common/tdesc.h (enum tdesc_type_kind): Likewise. * features/aarch64-fpu.c (create_feature_aarch64_fpu): Regenerate. * features/aarch64-fpu.xml: Add ieee half view. * features/aarch64-sve.c (create_feature_aarch64_fpu): Likewise. * gdbtypes.c (gdbtypes_post_init): Add builtin_half * gdbtypes.h (struct builtin_type): Likewise. (struct objfile_type): Likewise. --- gdb/aarch64-tdep.c | 5 +++++ gdb/common/tdesc.c | 1 + gdb/common/tdesc.h | 1 + gdb/features/aarch64-fpu.c | 5 +++++ gdb/features/aarch64-fpu.xml | 2 ++ gdb/features/aarch64-sve.c | 5 +++++ gdb/gdbtypes.c | 3 +++ gdb/gdbtypes.h | 2 ++ gdb/target-descriptions.c | 5 +++++ 9 files changed, 29 insertions(+) -- 2.20.1 (Apple Git-117) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 1b3977bfaf..8a5e7b9570 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -1928,6 +1928,9 @@ aarch64_vnh_type (struct gdbarch *gdbarch) t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh", TYPE_CODE_UNION); + elem = builtin_type (gdbarch)->builtin_half; + append_composite_type_field (t, "f", elem); + elem = builtin_type (gdbarch)->builtin_uint16; append_composite_type_field (t, "u", elem); @@ -2006,6 +2009,8 @@ aarch64_vnv_type (struct gdbarch *gdbarch) sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh", TYPE_CODE_UNION); + append_composite_type_field (sub, "f", + init_vector_type (bt->builtin_half, 8)); append_composite_type_field (sub, "u", init_vector_type (bt->builtin_uint16, 8)); append_composite_type_field (sub, "s", diff --git a/gdb/common/tdesc.c b/gdb/common/tdesc.c index fe63a36c33..f946a53c7f 100644 --- a/gdb/common/tdesc.c +++ b/gdb/common/tdesc.c @@ -50,6 +50,7 @@ static tdesc_type_builtin tdesc_predefined_types[] = { "uint128", TDESC_TYPE_UINT128 }, { "code_ptr", TDESC_TYPE_CODE_PTR }, { "data_ptr", TDESC_TYPE_DATA_PTR }, + { "ieee_half", TDESC_TYPE_IEEE_HALF }, { "ieee_single", TDESC_TYPE_IEEE_SINGLE }, { "ieee_double", TDESC_TYPE_IEEE_DOUBLE }, { "arm_fpa_ext", TDESC_TYPE_ARM_FPA_EXT }, diff --git a/gdb/common/tdesc.h b/gdb/common/tdesc.h index a0bc6339e2..9eb3d5ea31 100644 --- a/gdb/common/tdesc.h +++ b/gdb/common/tdesc.h @@ -147,6 +147,7 @@ enum tdesc_type_kind TDESC_TYPE_UINT128, TDESC_TYPE_CODE_PTR, TDESC_TYPE_DATA_PTR, + TDESC_TYPE_IEEE_HALF, TDESC_TYPE_IEEE_SINGLE, TDESC_TYPE_IEEE_DOUBLE, TDESC_TYPE_ARM_FPA_EXT, diff --git a/gdb/features/aarch64-fpu.c b/gdb/features/aarch64-fpu.c index 47962d1f24..b73d12ebe4 100644 --- a/gdb/features/aarch64-fpu.c +++ b/gdb/features/aarch64-fpu.c @@ -28,6 +28,9 @@ create_feature_aarch64_fpu (struct target_desc *result, long regnum) element_type = tdesc_named_type (feature, "int32"); tdesc_create_vector (feature, "v4i", element_type, 4); + element_type = tdesc_named_type (feature, "ieee_half"); + tdesc_create_vector (feature, "v8f", element_type, 8); + element_type = tdesc_named_type (feature, "uint16"); tdesc_create_vector (feature, "v8u", element_type, 8); @@ -65,6 +68,8 @@ create_feature_aarch64_fpu (struct target_desc *result, long regnum) tdesc_add_field (type_with_fields, "s", field_type); type_with_fields = tdesc_create_union (feature, "vnh"); + field_type = tdesc_named_type (feature, "v8f"); + tdesc_add_field (type_with_fields, "f", field_type); field_type = tdesc_named_type (feature, "v8u"); tdesc_add_field (type_with_fields, "u", field_type); field_type = tdesc_named_type (feature, "v8i"); diff --git a/gdb/features/aarch64-fpu.xml b/gdb/features/aarch64-fpu.xml index 141c996ead..1eba8faea7 100644 --- a/gdb/features/aarch64-fpu.xml +++ b/gdb/features/aarch64-fpu.xml @@ -14,6 +14,7 @@ + @@ -31,6 +32,7 @@ + diff --git a/gdb/features/aarch64-sve.c b/gdb/features/aarch64-sve.c index 2166b4bb07..ae292d2f3d 100644 --- a/gdb/features/aarch64-sve.c +++ b/gdb/features/aarch64-sve.c @@ -55,6 +55,9 @@ create_feature_aarch64_sve (struct target_desc *result, long regnum, element_type = tdesc_named_type (feature, "int32"); tdesc_create_vector (feature, "svevss", element_type, 4 * scale); + element_type = tdesc_named_type (feature, "ieee_half"); + tdesc_create_vector (feature, "svevhf", element_type, 8 * scale); + element_type = tdesc_named_type (feature, "uint16"); tdesc_create_vector (feature, "svevhu", element_type, 8 * scale); @@ -90,6 +93,8 @@ create_feature_aarch64_sve (struct target_desc *result, long regnum, tdesc_add_field (type_with_fields, "s", field_type); type_with_fields = tdesc_create_union (feature, "svevnh"); + field_type = tdesc_named_type (feature, "svevhf"); + tdesc_add_field (type_with_fields, "f", field_type); field_type = tdesc_named_type (feature, "svevhu"); tdesc_add_field (type_with_fields, "u", field_type); field_type = tdesc_named_type (feature, "svevhs"); diff --git a/gdb/gdbtypes.c b/gdb/gdbtypes.c index 683238d03d..58d1573b1a 100644 --- a/gdb/gdbtypes.c +++ b/gdb/gdbtypes.c @@ -5358,6 +5358,9 @@ gdbtypes_post_init (struct gdbarch *gdbarch) builtin_type->builtin_unsigned_long_long = arch_integer_type (gdbarch, gdbarch_long_long_bit (gdbarch), 1, "unsigned long long"); + builtin_type->builtin_half + = arch_float_type (gdbarch, gdbarch_half_bit (gdbarch), + "half", gdbarch_half_format (gdbarch)); builtin_type->builtin_float = arch_float_type (gdbarch, gdbarch_float_bit (gdbarch), "float", gdbarch_float_format (gdbarch)); diff --git a/gdb/gdbtypes.h b/gdb/gdbtypes.h index 2125ed991d..e6f41e2265 100644 --- a/gdb/gdbtypes.h +++ b/gdb/gdbtypes.h @@ -1581,6 +1581,7 @@ struct builtin_type struct type *builtin_unsigned_short; struct type *builtin_unsigned_int; struct type *builtin_unsigned_long; + struct type *builtin_half; struct type *builtin_float; struct type *builtin_double; struct type *builtin_long_double; @@ -1676,6 +1677,7 @@ struct objfile_type struct type *builtin_unsigned_int; struct type *builtin_unsigned_long; struct type *builtin_unsigned_long_long; + struct type *builtin_half; struct type *builtin_float; struct type *builtin_double; struct type *builtin_long_double; diff --git a/gdb/target-descriptions.c b/gdb/target-descriptions.c index 96d453527c..bd33091ba9 100644 --- a/gdb/target-descriptions.c +++ b/gdb/target-descriptions.c @@ -119,6 +119,11 @@ make_gdb_type (struct gdbarch *gdbarch, struct tdesc_type *ttype) switch (e->kind) { + case TDESC_TYPE_IEEE_HALF: + m_type = arch_float_type (m_gdbarch, -1, "builtin_type_ieee_half", + floatformats_ieee_half); + return; + case TDESC_TYPE_IEEE_SINGLE: m_type = arch_float_type (m_gdbarch, -1, "builtin_type_ieee_single", floatformats_ieee_single);