From patchwork Tue Nov 13 05:37:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Wilson X-Patchwork-Id: 30128 Received: (qmail 60080 invoked by alias); 13 Nov 2018 05:38:10 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 60070 invoked by uid 89); 13 Nov 2018 05:38:09 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1142, HX-Received:4784, Hx-spam-relays-external:209.85.215.195, H*RU:209.85.215.195 X-HELO: mail-pg1-f195.google.com Received: from mail-pg1-f195.google.com (HELO mail-pg1-f195.google.com) (209.85.215.195) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 13 Nov 2018 05:38:08 +0000 Received: by mail-pg1-f195.google.com with SMTP id r9-v6so5150818pgv.6 for ; Mon, 12 Nov 2018 21:38:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6c6Ulzbt0Wf9iG4ixbhwmvD/Bi4erv1009VewFn/d54=; b=Q3I629SoLwRZshlpksNpzOj3VvDD3cyjs8+jI/9wXiLH84bTUmRszs13Zd8cxzH5bQ ESyjFUSRcXggplYy+oG4OU7dvM1N3bBAKbxm4x6JLNSRKq1TVdDtZ5IThes6Ch2s21Sx R1b5cqqhZlKuprHZM0Pki6bhhcTYzg5kvth4O4dYifMNx1dG33DO/+9znlg0eI3kdYEf D4ANJvgv9ku2EQs2Hj6/2RxK0gXVk799bfJ/VOJQNluS4LDqasASEV5TT6hEiPpiO3RP c/PsLPZp24ZQW826GfWVBnh7pvXlTGsOy1q5SOHFd/x+yrmJLmYJtpv11/H9hR/e1e6z irug== Return-Path: Received: from rohan.hsd1.ca.comcast.net ([2601:646:c100:8240:b06e:359d:dfe4:197]) by smtp.gmail.com with ESMTPSA id s86-v6sm39171675pfa.137.2018.11.12.21.38.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Nov 2018 21:38:06 -0800 (PST) From: Jim Wilson To: gdb-patches@sourceware.org Cc: andrew.burgess@embecosm.com, Jim Wilson Subject: [PATCH 1/3 v2] RISC-V: Give stack slots same align as XLEN. Date: Mon, 12 Nov 2018 21:37:50 -0800 Message-Id: <20181113053750.4975-1-jimw@sifive.com> In-Reply-To: References: For riscv64-linux target, fixes FAIL: gdb.base/gnu_vector.exp: call add_many_charvecs Ensure that stack slots are always the same alignment as XLEN by rounding up arg align to xlen. gdb/ * riscv-tdep.c (riscv_call_arg_scalar_int): Use std::min when setting len. New local align, set to max of arg align and xlen, and pass to first riscv_assign_stack_location call. --- gdb/riscv-tdep.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index db372e2163..f4650dfbf3 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -1923,12 +1923,13 @@ riscv_call_arg_scalar_int (struct riscv_arg_info *ainfo, } else { - int len = (ainfo->length > cinfo->xlen) ? cinfo->xlen : ainfo->length; + int len = std::min (ainfo->length, cinfo->xlen); + int align = std::max (ainfo->align, cinfo->xlen); if (!riscv_assign_reg_location (&ainfo->argloc[0], &cinfo->int_regs, len, 0)) riscv_assign_stack_location (&ainfo->argloc[0], - &cinfo->memory, len, ainfo->align); + &cinfo->memory, len, align); if (len < ainfo->length) {