From patchwork Tue Nov 6 21:44:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Wilson X-Patchwork-Id: 30050 Received: (qmail 50263 invoked by alias); 6 Nov 2018 21:44:53 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 50248 invoked by uid 89); 6 Nov 2018 21:44:52 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.1 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:3046, We'll, Hx-spam-relays-external:209.85.215.195, H*RU:209.85.215.195 X-HELO: mail-pg1-f195.google.com Received: from mail-pg1-f195.google.com (HELO mail-pg1-f195.google.com) (209.85.215.195) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 06 Nov 2018 21:44:50 +0000 Received: by mail-pg1-f195.google.com with SMTP id y4so5952962pgc.12 for ; Tue, 06 Nov 2018 13:44:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UxXZIs5cFX8cIEJ+Zk2+zC5rCB8FUmrjQP3TFPBeQfA=; b=gvs8WACYump3zeK6eu2jowpjMOVFt4XKdJTwmsHE2FmC+pF/xD2ZUU9QC4PubeowVN lYJgm7vwwg9IJIzB6048fodLHOcFv0pnNUGziUWW5BRFBxRfi4QgDOG1hOYmlskYcQTd JbphzmIKFZq2Hest8sgVMJ4qZZKs2CfXYLUA9RHkoFqAZWHZXUZkZshBEu7TzTKH4kNm KwmSnnCOpXMRrvNwynSIqn1gc17y/vOE3bmXHbOIB58COjvO/bhBTxHqYe0AOZCeaWve 0jurNbSuxBy5X9a9ROtmX8StmuBiX/KBOf62NjNi+CPHIVL3457ocR06f4IROUnPYmPm 3u5A== Return-Path: Received: from rohan.guest.sifive.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id n26-v6sm36449996pfh.166.2018.11.06.13.44.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Nov 2018 13:44:48 -0800 (PST) From: Jim Wilson To: gdb-patches@sourceware.org Cc: Jim Wilson Subject: [PATCH 3/3] RISC-V: gdb.base/gnu_vector fixes. Date: Tue, 6 Nov 2018 13:44:46 -0800 Message-Id: <20181106214446.22325-1-jimw@sifive.com> In-Reply-To: References: Unnamed arguments with 2*XLEN alignment are passed in aligned register pairs. gdb/ * riscv-tdep.c (struct riscv_arg_info): New field is_unnamed. (riscv_call_arg_scalar_int): If unnamed arg with twice xlen alignment, then increment next_regnum if odd. (riscv_arg_location): New arg is_unnamed. Set ainfo->is_unnamed. (riscv_push_dummy_call): New local ftype. Call check_typedef to set function type. Pass new arg to riscv_arg_location based on function type. (riscv_return_value): Pass new arg to riscv_arg_location. --- gdb/riscv-tdep.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index 3d4f7e3dcc..93310c329f 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -1737,6 +1737,9 @@ struct riscv_arg_info then this offset will be set to 0. */ int c_offset; } argloc[2]; + + /* TRUE if this is an unnamed argument. */ + bool is_unnamed; }; /* Information about a set of registers being used for passing arguments as @@ -1932,6 +1935,12 @@ riscv_call_arg_scalar_int (struct riscv_arg_info *ainfo, { int len = (ainfo->length > cinfo->xlen) ? cinfo->xlen : ainfo->length; + /* Unnamed arguments in registers that require 2*XLEN alignment are + passed in an aligned register pair. */ + if (ainfo->is_unnamed && (ainfo->align == cinfo->xlen * 2) + && cinfo->int_regs.next_regnum & 1) + cinfo->int_regs.next_regnum++; + if (!riscv_assign_reg_location (&ainfo->argloc[0], &cinfo->int_regs, len, 0)) riscv_assign_stack_location (&ainfo->argloc[0], @@ -2222,11 +2231,12 @@ static void riscv_arg_location (struct gdbarch *gdbarch, struct riscv_arg_info *ainfo, struct riscv_call_info *cinfo, - struct type *type) + struct type *type, bool is_unnamed) { ainfo->type = type; ainfo->length = TYPE_LENGTH (ainfo->type); ainfo->align = riscv_type_alignment (ainfo->type); + ainfo->is_unnamed = is_unnamed; ainfo->contents = nullptr; switch (TYPE_CODE (ainfo->type)) @@ -2375,6 +2385,11 @@ riscv_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR osp = sp; + struct type *ftype = check_typedef (value_type (function)); + + if (TYPE_CODE (ftype) == TYPE_CODE_PTR) + ftype = check_typedef (TYPE_TARGET_TYPE (ftype)); + /* We'll use register $a0 if we're returning a struct. */ if (struct_return) ++call_info.int_regs.next_regnum; @@ -2388,7 +2403,8 @@ riscv_push_dummy_call (struct gdbarch *gdbarch, arg_value = args[i]; arg_type = check_typedef (value_type (arg_value)); - riscv_arg_location (gdbarch, info, &call_info, arg_type); + riscv_arg_location (gdbarch, info, &call_info, arg_type, + TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype)); if (info->type != arg_type) arg_value = value_cast (info->type, arg_value); @@ -2565,7 +2581,7 @@ riscv_return_value (struct gdbarch *gdbarch, struct type *arg_type; arg_type = check_typedef (type); - riscv_arg_location (gdbarch, &info, &call_info, arg_type); + riscv_arg_location (gdbarch, &info, &call_info, arg_type, false); if (riscv_debug_infcall > 0) {