[08/17,PowerPC] Add tests for PPR and DSCR

Message ID 20180713135226.2321-9-pedromfc@linux.ibm.com
State New, archived
Headers

Commit Message

Pedro Franco de Carvalho July 13, 2018, 1:52 p.m. UTC
  This patch adds a testcase for GDB access to the Program Priorty
Register and Data Stream Control Register.

gdb/ChangeLog:
YYYY-MM-DD  Pedro Franco de Carvalho  <pedromfc@linux.ibm.com>

	* gdb.arch/powerpc-ppr-dscr.c: New file.
	* gdb.arch/powerpc-ppr-dscr.exp: New file.
---
 gdb/testsuite/gdb.arch/powerpc-ppr-dscr.c   |  32 ++++++++
 gdb/testsuite/gdb.arch/powerpc-ppr-dscr.exp | 110 ++++++++++++++++++++++++++++
 2 files changed, 142 insertions(+)
 create mode 100644 gdb/testsuite/gdb.arch/powerpc-ppr-dscr.c
 create mode 100644 gdb/testsuite/gdb.arch/powerpc-ppr-dscr.exp
  

Patch

diff --git a/gdb/testsuite/gdb.arch/powerpc-ppr-dscr.c b/gdb/testsuite/gdb.arch/powerpc-ppr-dscr.c
new file mode 100644
index 0000000000..b53bf0d4d3
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-ppr-dscr.c
@@ -0,0 +1,32 @@ 
+/* This test is part of GDB, the GNU debugger.
+
+   Copyright 2018 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+int main (void)
+{
+  /* Set Load Stream Disable bit in DSCR.  */
+  unsigned long dscr = 0x20;
+
+  /* This is the non-privileged SPR number to access DSCR,
+     available since isa 207.  */
+  asm volatile ("mtspr 3,%0" : : "r" (dscr));
+
+  /* Set PPR to low priority (010 in bits 11:13, or
+     0x0008000000000000).  */
+  asm volatile ("or 1,1,1");
+  asm volatile ("nop"); // marker
+  asm volatile ("nop");
+}
diff --git a/gdb/testsuite/gdb.arch/powerpc-ppr-dscr.exp b/gdb/testsuite/gdb.arch/powerpc-ppr-dscr.exp
new file mode 100644
index 0000000000..14cfa344bd
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-ppr-dscr.exp
@@ -0,0 +1,110 @@ 
+# Copyright 2018 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test access to special purpose registers PPR and DSCR.
+
+if {![istarget "powerpc*-*-linux*"]} then {
+    verbose "Skipping PowerPC test for PPR and DSCR registers."
+    return
+}
+
+standard_testfile .c
+
+if {[build_executable "compile" $binfile $srcfile {debug}] == -1} {
+    return
+}
+
+proc check_register_access { regname } {
+    global gdb_prompt
+
+    set test "$regname register access"
+    gdb_test_multiple "info reg $regname" "$test" {
+	-re "Invalid register.*\r\n$gdb_prompt $" {
+	    unsupported "$test"
+	    return 0
+	}
+	-re "\r\n$regname.*\r\n$gdb_prompt $" {
+	    pass "$test"
+	    return 1
+	}
+    }
+    return 0
+}
+
+clean_restart $binfile
+
+if ![runto_main] {
+    return
+}
+
+if {![check_register_access "ppr"]} {
+    return
+}
+
+if {![check_register_access "dscr"]} {
+    return
+}
+
+# Do one pass to check if the instructions in our test programs are
+# available to this processor (e.g. mtspr 3, RS for accessing DSCR).
+proc ppr_dscr_available {} {
+    global gdb_prompt
+    global inferior_exited_re
+
+    set test "PPR/DSCR available to inferior"
+    gdb_test_multiple "continue" "" {
+	-re "Illegal instruction.*\r\n$gdb_prompt $" {
+	    unsupported "$test"
+	    return 0
+	}
+	-re "$inferior_exited_re normally.*$gdb_prompt $" {
+	    pass "$test"
+	    return 1
+	}
+    }
+    return 0
+}
+
+if {![ppr_dscr_available]} {
+    return
+}
+
+# Now do the actual test
+clean_restart $binfile
+
+runto_main
+
+set bp_line [gdb_get_line_number "marker"]
+
+gdb_breakpoint ${srcfile}:${bp_line}
+
+gdb_continue_to_breakpoint "continue to marker"
+
+# At the breakpoint the inferior should have set the
+# registers to these expected values.
+gdb_test "info reg dscr" "dscr.*0x0*20\[ \t\]+.*"
+gdb_test "info reg ppr" "ppr.*0x0*8000000000000\[ \t\]+.*"
+
+# Set Store Stream Enable in DSCR and set PPR to the medium-low
+# priority.
+gdb_test_no_output "set \$dscr = 0x8"
+gdb_test_no_output "set \$ppr = 0xC000000000000"
+
+gdb_test "stepi" "asm.*"
+
+gdb_test "info reg dscr" "dscr.*0x0*8+\[ \t\]+.*"
+gdb_test "info reg ppr" "ppr.*0x0*\[cC\]000000000000\[ \t\]+.*"