From patchwork Wed Aug 19 07:08:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Buettner X-Patchwork-Id: 8288 Received: (qmail 80015 invoked by alias); 19 Aug 2015 07:08:48 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 80006 invoked by uid 89); 19 Aug 2015 07:08:48 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-3.6 required=5.0 tests=AWL, BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD, SPF_HELO_PASS autolearn=no version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Wed, 19 Aug 2015 07:08:47 +0000 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (Postfix) with ESMTPS id 75DDC14AAA for ; Wed, 19 Aug 2015 07:08:46 +0000 (UTC) Received: from pinnacle.lan ([10.3.113.17]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t7J78jBv007997 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA256 bits=256 verify=NO) for ; Wed, 19 Aug 2015 03:08:46 -0400 Date: Wed, 19 Aug 2015 00:08:44 -0700 From: Kevin Buettner To: gdb-patches@sourceware.org Subject: [PATCH 5/8] Implement unconditional_branch_address method for arm and thumb Message-ID: <20150819000844.60224486@pinnacle.lan> In-Reply-To: <20150818235334.1afb0c85@pinnacle.lan> References: <20150818235334.1afb0c85@pinnacle.lan> MIME-Version: 1.0 X-IsSubscribed: yes Implement unconditional_branch_address method for arm and thumb. gdb/ChangeLog: * arm-tdep.c (arm_unconditional_branch_address): New function. (arm_gdbarch_init): Register arm_unconditional_branch_address. --- gdb/arm-tdep.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 73f26b9..2e16a28 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -9902,7 +9902,32 @@ arm_register_g_packet_guesses (struct gdbarch *gdbarch) /* Otherwise we don't have a useful guess. */ } + +/* Implement the unconditional_branch_address gdbarch method. */ + +static CORE_ADDR +arm_unconditional_branch_address (struct gdbarch *gdbarch, CORE_ADDR pc) +{ + enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch); + unsigned int insn; + + if (arm_pc_is_thumb (gdbarch, pc)) + { + insn = read_memory_unsigned_integer (pc, 2, byte_order_for_code); + if ((insn & 0xf800) == 0xe000) + return pc + 4 + (sbits (insn, 0, 10) << 1); + } + else + { + insn = read_memory_unsigned_integer (pc, 4, byte_order_for_code); + + if (bits (insn, 28, 31) == INST_AL && bits (insn, 24, 27) == 0xa) + return BranchDest (pc, insn); + } + + return 0; +} /* Initialize the current architecture based on INFO. If possible, re-use an architecture from ARCHES, which is a list of @@ -10499,6 +10524,10 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) user_reg_add (gdbarch, arm_register_aliases[i].name, value_of_arm_user_reg, &arm_register_aliases[i].regnum); + /* Unconditional Branch. */ + set_gdbarch_unconditional_branch_address (gdbarch, + arm_unconditional_branch_address); + return gdbarch; }