From patchwork Thu Dec 19 13:31:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chenzefeng X-Patchwork-Id: 36964 Received: (qmail 23828 invoked by alias); 19 Dec 2019 13:31:57 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 23820 invoked by uid 89); 19 Dec 2019 13:31:57 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: huawei.com Received: from szxga07-in.huawei.com (HELO huawei.com) (45.249.212.35) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 19 Dec 2019 13:31:56 +0000 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 8245B38F5D3E58007396 for ; Thu, 19 Dec 2019 21:31:50 +0800 (CST) Received: from use12-sp2.huawei.com (10.67.189.177) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Thu, 19 Dec 2019 21:31:42 +0800 From: chenzefeng To: CC: , , Subject: [PATCH] gdb/arm-tdep: fix to adapt insn "str rd, [sp, #-imm]" Date: Thu, 19 Dec 2019 21:31:39 +0800 Message-ID: <1576762299-7119-1-git-send-email-chenzefeng2@huawei.com> MIME-Version: 1.0 In the code below, GDB get an incorrect backtrace: 0x000f13fc <+0>: str r4, [sp, #-8]! according to the ARMV7 manual, the insn of str have 12 bits immediate. Signed-off-by: chenzefeng --- gdb/arm-tdep.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 69c87c5..8a9f878 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -1539,12 +1539,13 @@ arm_analyze_prologue (struct gdbarch *gdbarch, regs[rd] = pv_add_constant (regs[bits (insn, 16, 19)], -imm); continue; } - else if ((insn & 0xffff0fff) == 0xe52d0004) /* str Rd, - [sp, #-4]! */ + else if ((insn & 0xffff0000) == 0xe52d0000) /* str Rd, + [sp, #-imm]! */ { + unsigned imm = insn & 0xfff; if (stack.store_would_trash (regs[ARM_SP_REGNUM])) break; - regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM], -4); + regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM], -imm); stack.store (regs[ARM_SP_REGNUM], 4, regs[bits (insn, 12, 15)]); continue;