diff mbox

[1/2] gdb: xtensa-linux: support THREADPTR register

Message ID 1484783816-13856-2-git-send-email-jcmvbkbc@gmail.com
State New, archived
Headers

Commit Message

Max Filippov Jan. 18, 2017, 11:56 p.m. UTC 
  Make THREADPTR user register accessible.

2017-01-18  Max Filippov  <jcmvbkbc@gmail.com>
gdb/
	* xtensa-linux-nat.c (fill_gregset): Call regcache_raw_collect
	for THREADPTR register.
	(supply_gregset_reg): Call regcache_raw_supply for THREADPTR
	register.
	* xtensa-tdep.c (XTENSA_DBREGN_UREG): New definition.
	(xtensa_derive_tdep): Initialize tdep->threadptr_regnum.
	* xtensa-tdep.h (gdbarch_tdep::threadptr_regnum): New field.
---
 gdb/xtensa-linux-nat.c | 8 ++++++++
 gdb/xtensa-tdep.c      | 3 +++
 gdb/xtensa-tdep.h      | 1 +
 3 files changed, 12 insertions(+)

Comments

Luis Machado Feb. 13, 2017, 6:17 p.m. UTC | #1 
On 01/18/2017 05:56 PM, Max Filippov wrote:
> Make THREADPTR user register accessible.
>
> 2017-01-18  Max Filippov  <jcmvbkbc@gmail.com>
> gdb/

Drop gdb/ from the ChangeLog.

> diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
> index 797e728..2c3e41e 100644
> --- a/gdb/xtensa-tdep.c
> +++ b/gdb/xtensa-tdep.c
> @@ -3120,6 +3120,7 @@ xtensa_derive_tdep (struct gdbarch_tdep *tdep)
>
>  /* Special registers 0..255 (core).  */
>  #define XTENSA_DBREGN_SREG(n)  (0x0200+(n))
> +#define XTENSA_DBREGN_UREG(n)  (0x0300+(n))

Maybe add a little comment about what UREG is and its use?

Otherwise i have no further comments on this particular patch.
Max Filippov Feb. 14, 2017, 9:06 a.m. UTC | #2 
On Mon, Feb 13, 2017 at 10:17 AM, Luis Machado
<lgustavo@codesourcery.com> wrote:
> On 01/18/2017 05:56 PM, Max Filippov wrote:
>>
>> Make THREADPTR user register accessible.
>>
>> 2017-01-18  Max Filippov  <jcmvbkbc@gmail.com>
>> gdb/
>
>
> Drop gdb/ from the ChangeLog.

It's the commit message, not the actual ChangeLog.
I see that specifying location of the ChangeLog file where a section
of the commit message goes is common practice, is it considered bad?
Of course I will not put it to the ChangeLog.

>> diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
>> index 797e728..2c3e41e 100644
>> --- a/gdb/xtensa-tdep.c
>> +++ b/gdb/xtensa-tdep.c
>> @@ -3120,6 +3120,7 @@ xtensa_derive_tdep (struct gdbarch_tdep *tdep)
>>
>>  /* Special registers 0..255 (core).  */
>>  #define XTENSA_DBREGN_SREG(n)  (0x0200+(n))
>> +#define XTENSA_DBREGN_UREG(n)  (0x0300+(n))
>
>
> Maybe add a little comment about what UREG is and its use?

Will add.

> Otherwise i have no further comments on this particular patch.
Luis Machado Feb. 14, 2017, 9:57 a.m. UTC | #3 
On 02/14/2017 03:06 AM, Max Filippov wrote:
> On Mon, Feb 13, 2017 at 10:17 AM, Luis Machado
> <lgustavo@codesourcery.com> wrote:
>> On 01/18/2017 05:56 PM, Max Filippov wrote:
>>>
>>> Make THREADPTR user register accessible.
>>>
>>> 2017-01-18  Max Filippov  <jcmvbkbc@gmail.com>
>>> gdb/
>>
>>
>> Drop gdb/ from the ChangeLog.

It is fine for the commit log, but we usually put it before the date:

gdb/
2017-01-18  Max Filippov  <jcmvbkbc@gmail.com>
diff mbox

Patch

diff --git a/gdb/xtensa-linux-nat.c b/gdb/xtensa-linux-nat.c
index 2693939..0f77be7 100644
--- a/gdb/xtensa-linux-nat.c
+++ b/gdb/xtensa-linux-nat.c
@@ -84,6 +84,10 @@  fill_gregset (const struct regcache *regcache,
     regcache_raw_collect (regcache,
 			  gdbarch_tdep (gdbarch)->sar_regnum,
 			  &regs->sar);
+  if (regnum == gdbarch_tdep (gdbarch)->threadptr_regnum || regnum == -1)
+    regcache_raw_collect (regcache,
+			  gdbarch_tdep (gdbarch)->threadptr_regnum,
+			  &regs->threadptr);
   if (regnum >=gdbarch_tdep (gdbarch)->ar_base
       && regnum < gdbarch_tdep (gdbarch)->ar_base
 		    + gdbarch_tdep (gdbarch)->num_aregs)
@@ -150,6 +154,10 @@  supply_gregset_reg (struct regcache *regcache,
     regcache_raw_supply (regcache,
 			  gdbarch_tdep (gdbarch)->sar_regnum,
 			  &regs->sar);
+  if (regnum == gdbarch_tdep (gdbarch)->threadptr_regnum || regnum == -1)
+    regcache_raw_supply (regcache,
+			  gdbarch_tdep (gdbarch)->threadptr_regnum,
+			  &regs->threadptr);
   if (regnum >=gdbarch_tdep (gdbarch)->ar_base
       && regnum < gdbarch_tdep (gdbarch)->ar_base
 		    + gdbarch_tdep (gdbarch)->num_aregs)
diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
index 797e728..2c3e41e 100644
--- a/gdb/xtensa-tdep.c
+++ b/gdb/xtensa-tdep.c
@@ -3120,6 +3120,7 @@  xtensa_derive_tdep (struct gdbarch_tdep *tdep)
 
 /* Special registers 0..255 (core).  */
 #define XTENSA_DBREGN_SREG(n)  (0x0200+(n))
+#define XTENSA_DBREGN_UREG(n)  (0x0300+(n))
 
   for (rmap = tdep->regmap, n = 0; rmap->target_number != -1; n++, rmap++)
     {
@@ -3151,6 +3152,8 @@  xtensa_derive_tdep (struct gdbarch_tdep *tdep)
 	tdep->litbase_regnum = n;
       else if (rmap->target_number == XTENSA_DBREGN_SREG(230))
 	tdep->ps_regnum = n;
+      else if (rmap->target_number == XTENSA_DBREGN_UREG(231))
+	tdep->threadptr_regnum = n;
 #if 0
       else if (rmap->target_number == XTENSA_DBREGN_SREG(226))
 	tdep->interrupt_regnum = n;
diff --git a/gdb/xtensa-tdep.h b/gdb/xtensa-tdep.h
index 46aeecb..986aa68 100644
--- a/gdb/xtensa-tdep.h
+++ b/gdb/xtensa-tdep.h
@@ -204,6 +204,7 @@  struct gdbarch_tdep
   int lcount_regnum;
   int sar_regnum;		/* Register number of SAR.  */
   int litbase_regnum;		/* Register number of LITBASE.  */
+  int threadptr_regnum;		/* Register number of THREADPTR.  */
 
   int interrupt_regnum;		/* Register number for interrupt.  */
   int interrupt2_regnum;	/* Register number for interrupt2.  */