diff mbox

[15/23] Fix spelling mistakes in comments in .igen files

Message ID 1479663498-30295-16-git-send-email-ambrogino.modigliani@mail.com
State New, archived
Headers

Commit Message

Ambrogino Modigliani Nov. 20, 2016, 5:38 p.m. UTC 
  sim/mips/ChangeLog:

        * sim/mips/m16.igen: Fix spelling in comments.
        * sim/mips/mips.igen: Fix spelling in comments.

sim/v850/ChangeLog:

        * sim/v850/v850.igen: Fix spelling in comments.
---
 sim/mips/m16.igen  | 4 ++--
 sim/mips/mips.igen | 6 +++---
 sim/v850/v850.igen | 4 ++--
 3 files changed, 7 insertions(+), 7 deletions(-)
diff mbox

Patch

diff --git a/sim/mips/m16.igen b/sim/mips/m16.igen
index 74adacd..db58184 100644
--- a/sim/mips/m16.igen
+++ b/sim/mips/m16.igen
@@ -1044,12 +1044,12 @@ 
   return target;
 }
   
-// compute basepc dependant on us being in a delay slot
+// compute basepc dependent on us being in a delay slot
 :function:::address_word:basepc:
 {
   if (STATE & simDELAYSLOT)
     {
-      return DSPC; /* return saved address of preceeding jmp */
+      return DSPC; /* return saved address of preceding jmp */
     }
   else
     {
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 522cad6..99caefb 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -254,9 +254,9 @@ 
 // suggest they don't.
 //
 // In reality, some MIPS IV parts, such as the VR5000 and VR5400, do have
-// these restrictions, while others, like the VR5500, don't.  To accomodate
+// these restrictions, while others, like the VR5500, don't.  To accommodate
 // such differences, the MIPS IV and MIPS V version of these helper functions
-// use auxillary routines to determine whether the restriction applies.
+// use auxiliary routines to determine whether the restriction applies.
 
 // check_mf_cycles:
 //
@@ -417,7 +417,7 @@ 
 *micromips32:
 *micromips64:
 {
-  /* FIXME: could record the fact that a stall occured if we want */
+  /* FIXME: could record the fact that a stall occurred if we want */
   signed64 time = sim_events_time (SD);
   hi->op.timestamp = time;
   lo->op.timestamp = time;
diff --git a/sim/v850/v850.igen b/sim/v850/v850.igen
index 41a9075..af9b57b 100644
--- a/sim/v850/v850.igen
+++ b/sim/v850/v850.igen
@@ -1149,7 +1149,7 @@  rrrrr,111111,RRRRR + wwww,0011110,mmmm,0:XI:::mac
   hi   = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF));
   
   /* We now need to add all of these results together, taking care
-     to propogate the carries from the additions: */
+     to propagate the carries from the additions: */
   RdLo = Add32 (lo, (mid1 << 16), & carry);
   RdHi = carry;
   RdLo = Add32 (RdLo, (mid2 << 16), & carry);
@@ -1214,7 +1214,7 @@  rrrrr,111111,RRRRR + wwww,0011111,mmmm,0:XI:::macu
   hi   = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF));
   
   /* We now need to add all of these results together, taking care
-     to propogate the carries from the additions: */
+     to propagate the carries from the additions: */
   RdLo = Add32 (lo, (mid1 << 16), & carry);
   RdHi = carry;
   RdLo = Add32 (RdLo, (mid2 << 16), & carry);