From patchwork Wed Aug 31 15:05:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 15126 Received: (qmail 96818 invoked by alias); 31 Aug 2016 15:06:35 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 96605 invoked by uid 89); 31 Aug 2016 15:06:34 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-pf0-f194.google.com Received: from mail-pf0-f194.google.com (HELO mail-pf0-f194.google.com) (209.85.192.194) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 31 Aug 2016 15:06:22 +0000 Received: by mail-pf0-f194.google.com with SMTP id g202so2912692pfb.1 for ; Wed, 31 Aug 2016 08:06:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=T/6URgr2nKWYwj8+dLemWzilmwi7La0BWNdmC6vY6Ig=; b=H4OTtoxQyeCSY23/eUAnaXN/0/RGqo8YRWSQRIZigjXBFlP5iFtxVTsHtSCNDUZrqQ 3bVloVXQ1PBtoXpmhJR4xg4XVN35U8Wx2KYjfyl32+oKE/nWA1yknEjYKr0yceZAiUik qqdsEyl3igJeTGKqM2+dX//p1gkKqpArhH+BQDcXLuuhv57qDoCHfVYwp5E7AEunCLpi qGx7PlQN/aAo1Uo9CWM+4sZG/Qez3c/9suTNyNPA2D7erRn3qsB2LGPqlzC98p7ArtAz 3Pqhb7XnL6ZsNftXMgBiksML0gup8p6KR1Drf3sAqk0iz3PNUzidekg9R8W703jLnqoj psZw== X-Gm-Message-State: AE9vXwMzZwlVCt0g+q58zIf1gugCYaudKDEHJI4MkTQbvII3htXDsg0Ab319/e1c0gnH1Q== X-Received: by 10.98.8.142 with SMTP id 14mr17609841pfi.57.1472655978058; Wed, 31 Aug 2016 08:06:18 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (gcc115.osuosl.org. [140.211.9.73]) by smtp.gmail.com with ESMTPSA id c125sm464809pfc.40.2016.08.31.08.06.16 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 31 Aug 2016 08:06:17 -0700 (PDT) From: Yao Qi X-Google-Original-From: Yao Qi To: gdb-patches@sourceware.org Subject: [PATCH 06/13] Add enum for mips breakpoint kinds Date: Wed, 31 Aug 2016 16:05:58 +0100 Message-Id: <1472655965-12212-7-git-send-email-yao.qi@linaro.org> In-Reply-To: <1472655965-12212-1-git-send-email-yao.qi@linaro.org> References: <1472655965-12212-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes This patch adds an enum mips_breakpoint_kinds to avoid using magic numbers as much as possible. gdb: 2016-08-31 Yao Qi * mips-tdep.c (mips_breakpoint_kinds): New enum. (mips_breakpoint_from_pc): Use it. (mips_remote_breakpoint_from_pc): Likewise. --- gdb/mips-tdep.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 4e4d79e..34df8d0 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -107,6 +107,20 @@ static const char *const mips_abi_strings[] = { NULL }; +/* Enum describing the different kinds of breakpoints. */ + +enum mips_breakpoint_kinds +{ + /* 16-bit MIPS16 mode breakpoint */ + MIPS_BP_KIND_16BIT_MIPS16 = 2, + /* 16-bit microMIPS mode breakpoint */ + MIPS_BP_KIND_16BIT_MICROMIPS = 3, + /* 32-bit standard MIPS mode breakpoint */ + MIPS_BP_KIND_32BIT = 4, + /* 32-bit microMIPS mode breakpoint */ + MIPS_BP_KIND_32BIT_MICROMIPS = 5, +}; + /* For backwards compatibility we default to MIPS16. This flag is overridden as soon as unambiguous ELF file flags tell us the compressed ISA encoding used. */ @@ -7143,16 +7157,7 @@ mips_breakpoint_from_pc (struct gdbarch *gdbarch, } } -/* Determine the remote breakpoint kind suitable for the PC. The following - kinds are used: - - * 2 -- 16-bit MIPS16 mode breakpoint, - - * 3 -- 16-bit microMIPS mode breakpoint, - - * 4 -- 32-bit standard MIPS mode breakpoint, - - * 5 -- 32-bit microMIPS mode breakpoint. */ +/* Determine the remote breakpoint kind suitable for the PC. */ static void mips_remote_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, @@ -7163,21 +7168,23 @@ mips_remote_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, if (mips_pc_is_mips16 (gdbarch, pc)) { *pcptr = unmake_compact_addr (pc); - *kindptr = 2; + *kindptr = MIPS_BP_KIND_16BIT_MIPS16; } else if (mips_pc_is_micromips (gdbarch, pc)) { ULONGEST insn; int status; - int size; insn = mips_fetch_instruction (gdbarch, ISA_MICROMIPS, pc, &status); - size = status ? 2 : mips_insn_size (ISA_MICROMIPS, insn) == 2 ? 2 : 4; + if (status || (mips_insn_size (ISA_MICROMIPS, insn) == 2)) + *kindptr = MIPS_BP_KIND_16BIT_MICROMIPS; + else + *kindptr = MIPS_BP_KIND_32BIT_MICROMIPS; + *pcptr = unmake_compact_addr (pc); - *kindptr = size | 1; } else - *kindptr = 4; + *kindptr = MIPS_BP_KIND_32BIT; } /* Return non-zero if the standard MIPS instruction INST has a branch