From patchwork Mon Jun 27 14:49:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhushan Attarde X-Patchwork-Id: 13384 Received: (qmail 8175 invoked by alias); 27 Jun 2016 14:50:18 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 8083 invoked by uid 89); 27 Jun 2016 14:50:17 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=3.5 required=5.0 tests=AWL, BAYES_00, GARBLED_SUBJECT, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, SPF_PASS autolearn=no version=3.3.2 spammy=1102, odd, !doctype, doctype X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 27 Jun 2016 14:50:07 +0000 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id D5EFD3CC83136 for ; Mon, 27 Jun 2016 15:49:59 +0100 (IST) Received: from pudesk170.pu.imgtec.org (192.168.93.65) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.294.0; Mon, 27 Jun 2016 15:50:02 +0100 From: Bhushan Attarde To: CC: , , , , , Bhushan Attarde Subject: [PATCH 02/24] Add MIPS32 FPU64 GDB target descriptions Date: Mon, 27 Jun 2016 20:19:29 +0530 Message-ID: <1467038991-6600-2-git-send-email-bhushan.attarde@imgtec.com> In-Reply-To: <1467038991-6600-1-git-send-email-bhushan.attarde@imgtec.com> References: <1467038991-6600-1-git-send-email-bhushan.attarde@imgtec.com> MIME-Version: 1.0 Add a couple of new target descriptions for MIPS32 targets with 64-bit floating point registers, with and without DSP. These are identical to their 32-bit FPU counterparts except that the FP registers are 64-bits long to allow for debugging of F64=1 MIPS32 targets such as MIPS32r2 compatible cores, and they include the Config5 CP0 register which has an FRE bit. F64 targets have an FR bit in the status register to specify the effective register size, and the FRE bit is used with FR=1 to enable a compatibility mode which is similar to FR=0 but with usable odd doubles which don't alias with any other FP registers. gdb/ChangeLog: * features/Makefile (WHICH): Add mips-fpu64-linux and mips-fpu64-dsp-linux and Sort microblaze out of the way of mips/mips64 (mips-fpu64-expedite): Set. (mips-fpu64-dsp-expedite): Set. * features/mips-fpu64-dsp-linux.xml: New file. * features/mips-fpu64-linux.xml: New file. * features/mips-fpu64.xml: New file. * features/mips-fpu64-dsp-linux.c: New generated file. * features/mips-fpu64-linux.c: New generated file. * regformats/mips-fpu64-dsp-linux.dat: New generated file. * regformats/mips-fpu64-linux.dat: New generated file. gdb/gdbserver/ChangeLog: * Makefile.in (clean): Delete mips-fpu64-linux.c and mips-fpu64-dsp-linux.c. (mips-fpu64-linux.c): New rule. (mips-fpu64-dsp-linux.c): New rule. * configure.srv (srv_regobj): Add mips-fpu64-linux.o and mips-fpu64-dsp-linux.o. (srv_xmlfiles): Add mips-fpu64-linux.xml, mips-fpu64-dsp-linux.xml, mips-cp0-fpu64.xml and mips-fpu64.xml. --- gdb/features/Makefile | 6 +- gdb/features/mips-fpu64-dsp-linux.c | 111 ++++++++++++++++++++++++++++++++ gdb/features/mips-fpu64-dsp-linux.xml | 20 ++++++ gdb/features/mips-fpu64-linux.c | 102 +++++++++++++++++++++++++++++ gdb/features/mips-fpu64-linux.xml | 19 ++++++ gdb/features/mips-fpu64.xml | 45 +++++++++++++ gdb/gdbserver/Makefile.in | 7 +- gdb/gdbserver/configure.srv | 5 ++ gdb/regformats/mips-fpu64-dsp-linux.dat | 85 ++++++++++++++++++++++++ gdb/regformats/mips-fpu64-linux.dat | 78 ++++++++++++++++++++++ 10 files changed, 475 insertions(+), 3 deletions(-) create mode 100644 gdb/features/mips-fpu64-dsp-linux.c create mode 100644 gdb/features/mips-fpu64-dsp-linux.xml create mode 100644 gdb/features/mips-fpu64-linux.c create mode 100644 gdb/features/mips-fpu64-linux.xml create mode 100644 gdb/features/mips-fpu64.xml create mode 100644 gdb/regformats/mips-fpu64-dsp-linux.dat create mode 100644 gdb/regformats/mips-fpu64-linux.dat diff --git a/gdb/features/Makefile b/gdb/features/Makefile index 10173cf..b6baaf66 100644 --- a/gdb/features/Makefile +++ b/gdb/features/Makefile @@ -57,8 +57,8 @@ WHICH = aarch64 \ i386/x32 i386/x32-linux \ i386/x32-avx i386/x32-avx-linux \ i386/x32-avx512 i386/x32-avx512-linux \ - mips-linux mips-dsp-linux \ microblaze-with-stack-protect \ + mips-linux mips-dsp-linux mips-fpu64-linux mips-fpu64-dsp-linux \ mips64-linux mips64-dsp-linux \ nios2-linux \ rs6000/powerpc-32 \ @@ -100,11 +100,13 @@ i386/x32-avx-expedite = rbp,rsp,rip i386/x32-avx-linux-expedite = rbp,rsp,rip i386/x32-avx512-expedite = rbp,rsp,rip i386/x32-avx512-linux-expedite = rbp,rsp,rip +microblaze-expedite = r1,rpc mips-expedite = r29,pc mips-dsp-expedite = r29,pc +mips-fpu64-expedite = r29,pc +mips-fpu64-dsp-expedite = r29,pc mips64-expedite = r29,pc mips64-dsp-expedite = r29,pc -microblaze-expedite = r1,rpc nios2-linux-expedite = sp,pc powerpc-expedite = r1,pc rs6000/powerpc-cell32l-expedite = r1,pc,r0,orig_r3,r4 diff --git a/gdb/features/mips-fpu64-dsp-linux.c b/gdb/features/mips-fpu64-dsp-linux.c new file mode 100644 index 0000000..c6dd7d0 --- /dev/null +++ b/gdb/features/mips-fpu64-dsp-linux.c @@ -0,0 +1,111 @@ +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: + Original: mips-fpu64-dsp-linux.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_mips_fpu64_dsp_linux; +static void +initialize_tdesc_mips_fpu64_dsp_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + + set_tdesc_architecture (result, bfd_scan_arch ("mips")); + + set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cpu"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lo", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hi", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 37, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cp0"); + tdesc_create_reg (feature, "status", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "badvaddr", 35, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cause", 36, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "config5", 38, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.fpu"); + tdesc_create_reg (feature, "f0", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 64, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 65, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 66, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 67, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 68, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 69, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 70, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fcsr", 71, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fir", 72, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.dsp"); + tdesc_create_reg (feature, "hi1", 73, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lo1", 74, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hi2", 75, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lo2", 76, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hi3", 77, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lo3", 78, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "dspctl", 79, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.linux"); + tdesc_create_reg (feature, "restart", 80, 1, "system", 32, "int"); + + tdesc_mips_fpu64_dsp_linux = result; +} diff --git a/gdb/features/mips-fpu64-dsp-linux.xml b/gdb/features/mips-fpu64-dsp-linux.xml new file mode 100644 index 0000000..f0de5ce --- /dev/null +++ b/gdb/features/mips-fpu64-dsp-linux.xml @@ -0,0 +1,20 @@ + + + + + + mips + GNU/Linux + + + + + + + + + diff --git a/gdb/features/mips-fpu64-linux.c b/gdb/features/mips-fpu64-linux.c new file mode 100644 index 0000000..3fe4497 --- /dev/null +++ b/gdb/features/mips-fpu64-linux.c @@ -0,0 +1,102 @@ +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: + Original: mips-fpu64-linux.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_mips_fpu64_linux; +static void +initialize_tdesc_mips_fpu64_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + + set_tdesc_architecture (result, bfd_scan_arch ("mips")); + + set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cpu"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "lo", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "hi", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 37, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cp0"); + tdesc_create_reg (feature, "status", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "badvaddr", 35, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "cause", 36, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "config5", 38, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.fpu"); + tdesc_create_reg (feature, "f0", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 64, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 65, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 66, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 67, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 68, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 69, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 70, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fcsr", 71, 1, "float", 32, "int"); + tdesc_create_reg (feature, "fir", 72, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.mips.linux"); + tdesc_create_reg (feature, "restart", 73, 1, "system", 32, "int"); + + tdesc_mips_fpu64_linux = result; +} diff --git a/gdb/features/mips-fpu64-linux.xml b/gdb/features/mips-fpu64-linux.xml new file mode 100644 index 0000000..bc021c0 --- /dev/null +++ b/gdb/features/mips-fpu64-linux.xml @@ -0,0 +1,19 @@ + + + + + + mips + GNU/Linux + + + + + + + + diff --git a/gdb/features/mips-fpu64.xml b/gdb/features/mips-fpu64.xml new file mode 100644 index 0000000..88dc9d9 --- /dev/null +++ b/gdb/features/mips-fpu64.xml @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in index 1e874e3..9913d6a 100644 --- a/gdb/gdbserver/Makefile.in +++ b/gdb/gdbserver/Makefile.in @@ -357,7 +357,8 @@ clean: rm -f reg-tilegx.c reg-tilegx32.c rm -f arm-with-iwmmxt.c rm -f arm-with-vfpv2.c arm-with-vfpv3.c arm-with-neon.c - rm -f mips-linux.c mips-dsp-linux.c + rm -f mips-linux.c mips-dsp-linux.c mips-fpu64-linux.c + rm -f mips-fpu64-dsp-linux.c rm -f mips64-linux.c mips64-dsp-linux.c rm -f nios2-linux.c rm -f powerpc-32.c powerpc-32l.c powerpc-64l.c powerpc-e500l.c @@ -710,6 +711,10 @@ mips-linux.c : $(srcdir)/../regformats/mips-linux.dat $(regdat_sh) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-linux.dat mips-linux.c mips-dsp-linux.c : $(srcdir)/../regformats/mips-dsp-linux.dat $(regdat_sh) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-dsp-linux.dat mips-dsp-linux.c +mips-fpu64-linux.c : $(srcdir)/../regformats/mips-fpu64-linux.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-fpu64-linux.dat mips-fpu64-linux.c +mips-fpu64-dsp-linux.c : $(srcdir)/../regformats/mips-fpu64-dsp-linux.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-fpu64-dsp-linux.dat mips-fpu64-dsp-linux.c mips64-linux.c : $(srcdir)/../regformats/mips64-linux.dat $(regdat_sh) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips64-linux.dat mips64-linux.c mips64-dsp-linux.c : $(srcdir)/../regformats/mips64-dsp-linux.dat $(regdat_sh) diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv index a54b9e7..422fd90 100644 --- a/gdb/gdbserver/configure.srv +++ b/gdb/gdbserver/configure.srv @@ -187,15 +187,20 @@ case "${target}" in ;; mips*-*-linux*) srv_regobj="mips-linux.o" srv_regobj="${srv_regobj} mips-dsp-linux.o" + srv_regobj="${srv_regobj} mips-fpu64-linux.o" + srv_regobj="${srv_regobj} mips-fpu64-dsp-linux.o" srv_regobj="${srv_regobj} mips64-linux.o" srv_regobj="${srv_regobj} mips64-dsp-linux.o" srv_tgtobj="$srv_linux_obj linux-mips-low.o" srv_tgtobj="${srv_tgtobj} mips-linux-watch.o" srv_xmlfiles="mips-linux.xml" srv_xmlfiles="${srv_xmlfiles} mips-dsp-linux.xml" + srv_xmlfiles="${srv_xmlfiles} mips-fpu64-linux.xml" + srv_xmlfiles="${srv_xmlfiles} mips-fpu64-dsp-linux.xml" srv_xmlfiles="${srv_xmlfiles} mips-cpu.xml" srv_xmlfiles="${srv_xmlfiles} mips-cp0.xml" srv_xmlfiles="${srv_xmlfiles} mips-fpu.xml" + srv_xmlfiles="${srv_xmlfiles} mips-fpu64.xml" srv_xmlfiles="${srv_xmlfiles} mips-dsp.xml" srv_xmlfiles="${srv_xmlfiles} mips64-linux.xml" srv_xmlfiles="${srv_xmlfiles} mips64-dsp-linux.xml" diff --git a/gdb/regformats/mips-fpu64-dsp-linux.dat b/gdb/regformats/mips-fpu64-dsp-linux.dat new file mode 100644 index 0000000..0eac27f --- /dev/null +++ b/gdb/regformats/mips-fpu64-dsp-linux.dat @@ -0,0 +1,85 @@ +# DO NOT EDIT: generated from mips-fpu64-dsp-linux.xml +name:mips_fpu64_dsp_linux +xmltarget:mips-fpu64-dsp-linux.xml +expedite:r29,pc +32:r0 +32:r1 +32:r2 +32:r3 +32:r4 +32:r5 +32:r6 +32:r7 +32:r8 +32:r9 +32:r10 +32:r11 +32:r12 +32:r13 +32:r14 +32:r15 +32:r16 +32:r17 +32:r18 +32:r19 +32:r20 +32:r21 +32:r22 +32:r23 +32:r24 +32:r25 +32:r26 +32:r27 +32:r28 +32:r29 +32:r30 +32:r31 +32:status +32:lo +32:hi +32:badvaddr +32:cause +32:pc +32:config5 +64:f0 +64:f1 +64:f2 +64:f3 +64:f4 +64:f5 +64:f6 +64:f7 +64:f8 +64:f9 +64:f10 +64:f11 +64:f12 +64:f13 +64:f14 +64:f15 +64:f16 +64:f17 +64:f18 +64:f19 +64:f20 +64:f21 +64:f22 +64:f23 +64:f24 +64:f25 +64:f26 +64:f27 +64:f28 +64:f29 +64:f30 +64:f31 +32:fcsr +32:fir +32:hi1 +32:lo1 +32:hi2 +32:lo2 +32:hi3 +32:lo3 +32:dspctl +32:restart diff --git a/gdb/regformats/mips-fpu64-linux.dat b/gdb/regformats/mips-fpu64-linux.dat new file mode 100644 index 0000000..ad6c3c6 --- /dev/null +++ b/gdb/regformats/mips-fpu64-linux.dat @@ -0,0 +1,78 @@ +# DO NOT EDIT: generated from mips-fpu64-linux.xml +name:mips_fpu64_linux +xmltarget:mips-fpu64-linux.xml +expedite:r29,pc +32:r0 +32:r1 +32:r2 +32:r3 +32:r4 +32:r5 +32:r6 +32:r7 +32:r8 +32:r9 +32:r10 +32:r11 +32:r12 +32:r13 +32:r14 +32:r15 +32:r16 +32:r17 +32:r18 +32:r19 +32:r20 +32:r21 +32:r22 +32:r23 +32:r24 +32:r25 +32:r26 +32:r27 +32:r28 +32:r29 +32:r30 +32:r31 +32:status +32:lo +32:hi +32:badvaddr +32:cause +32:pc +32:config5 +64:f0 +64:f1 +64:f2 +64:f3 +64:f4 +64:f5 +64:f6 +64:f7 +64:f8 +64:f9 +64:f10 +64:f11 +64:f12 +64:f13 +64:f14 +64:f15 +64:f16 +64:f17 +64:f18 +64:f19 +64:f20 +64:f21 +64:f22 +64:f23 +64:f24 +64:f25 +64:f26 +64:f27 +64:f28 +64:f29 +64:f30 +64:f31 +32:fcsr +32:fir +32:restart