@@ -59,7 +59,8 @@ WHICH = aarch64 \
i386/x32-avx512 i386/x32-avx512-linux \
microblaze-with-stack-protect \
mips-linux mips-dsp-linux mips-fpu64-linux mips-fpu64-dsp-linux \
- mips64-linux mips64-dsp-linux \
+ mips-msa-linux \
+ mips64-linux mips64-dsp-linux mips64-msa-linux \
nios2-linux \
rs6000/powerpc-32 \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
@@ -105,8 +106,10 @@ mips-expedite = r29,pc
mips-dsp-expedite = r29,pc
mips-fpu64-expedite = r29,pc
mips-fpu64-dsp-expedite = r29,pc
+mips-msa-expedite = r29,pc
mips64-expedite = r29,pc
mips64-dsp-expedite = r29,pc
+mips64-msa-expedite = r29,pc
nios2-linux-expedite = sp,pc
powerpc-expedite = r1,pc
rs6000/powerpc-cell32l-expedite = r1,pc,r0,orig_r3,r4
new file mode 100644
@@ -0,0 +1,47 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010-2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.mips.fpu">
+ <vector id="msa128" type="ieee_double" count="2"/>
+
+ <reg name="f0" bitsize="128" type="msa128"/>
+ <reg name="f1" bitsize="128" type="msa128"/>
+ <reg name="f2" bitsize="128" type="msa128"/>
+ <reg name="f3" bitsize="128" type="msa128"/>
+ <reg name="f4" bitsize="128" type="msa128"/>
+ <reg name="f5" bitsize="128" type="msa128"/>
+ <reg name="f6" bitsize="128" type="msa128"/>
+ <reg name="f7" bitsize="128" type="msa128"/>
+ <reg name="f8" bitsize="128" type="msa128"/>
+ <reg name="f9" bitsize="128" type="msa128"/>
+ <reg name="f10" bitsize="128" type="msa128"/>
+ <reg name="f11" bitsize="128" type="msa128"/>
+ <reg name="f12" bitsize="128" type="msa128"/>
+ <reg name="f13" bitsize="128" type="msa128"/>
+ <reg name="f14" bitsize="128" type="msa128"/>
+ <reg name="f15" bitsize="128" type="msa128"/>
+ <reg name="f16" bitsize="128" type="msa128"/>
+ <reg name="f17" bitsize="128" type="msa128"/>
+ <reg name="f18" bitsize="128" type="msa128"/>
+ <reg name="f19" bitsize="128" type="msa128"/>
+ <reg name="f20" bitsize="128" type="msa128"/>
+ <reg name="f21" bitsize="128" type="msa128"/>
+ <reg name="f22" bitsize="128" type="msa128"/>
+ <reg name="f23" bitsize="128" type="msa128"/>
+ <reg name="f24" bitsize="128" type="msa128"/>
+ <reg name="f25" bitsize="128" type="msa128"/>
+ <reg name="f26" bitsize="128" type="msa128"/>
+ <reg name="f27" bitsize="128" type="msa128"/>
+ <reg name="f28" bitsize="128" type="msa128"/>
+ <reg name="f29" bitsize="128" type="msa128"/>
+ <reg name="f30" bitsize="128" type="msa128"/>
+ <reg name="f31" bitsize="128" type="msa128"/>
+
+ <reg name="fcsr" bitsize="32" group="float"/>
+ <reg name="fir" bitsize="32" group="float"/>
+</feature>
new file mode 100644
@@ -0,0 +1,110 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: mips-msa-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_mips_msa_linux;
+static void
+initialize_tdesc_mips_msa_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("mips"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cpu");
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "lo", 33, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "hi", 34, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "pc", 37, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cp0");
+ tdesc_create_reg (feature, "status", 32, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "badvaddr", 35, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "cause", 36, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "config5", 38, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.fpu");
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "msa128", field_type, 2);
+
+ tdesc_create_reg (feature, "f0", 39, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f1", 40, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f2", 41, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f3", 42, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f4", 43, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f5", 44, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f6", 45, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f7", 46, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f8", 47, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f9", 48, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f10", 49, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f11", 50, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f12", 51, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f13", 52, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f14", 53, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f15", 54, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f16", 55, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f17", 56, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f18", 57, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f19", 58, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f20", 59, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f21", 60, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f22", 61, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f23", 62, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f24", 63, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f25", 64, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f26", 65, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f27", 66, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f28", 67, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f29", 68, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f30", 69, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f31", 70, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "fcsr", 71, 1, "float", 32, "int");
+ tdesc_create_reg (feature, "fir", 72, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.msa");
+ tdesc_create_reg (feature, "msacsr", 73, 1, "vector", 32, "int");
+ tdesc_create_reg (feature, "msair", 74, 1, "vector", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.linux");
+ tdesc_create_reg (feature, "restart", 75, 1, "system", 32, "int");
+
+ tdesc_mips_msa_linux = result;
+}
new file mode 100644
@@ -0,0 +1,26 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2007-2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>mips</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="mips-cpu.xml"/>
+ <feature name="org.gnu.gdb.mips.cp0">
+ <reg name="status" bitsize="32" regnum="32"/>
+ <reg name="badvaddr" bitsize="32" regnum="35"/>
+ <reg name="cause" bitsize="32" regnum="36"/>
+ <reg name="config5" bitsize="32" regnum="38"/>
+ </feature>
+ <xi:include href="mips-fpu128.xml"/>
+ <xi:include href="mips-msa.xml"/>
+
+ <feature name="org.gnu.gdb.mips.linux">
+ <reg name="restart" bitsize="32" group="system"/>
+ </feature>
+
+</target>
new file mode 100644
@@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010-2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.mips.msa">
+ <reg name="msacsr" bitsize="32" group="vector"/>
+ <reg name="msair" bitsize="32" group="vector"/>
+</feature>
new file mode 100644
@@ -0,0 +1,47 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010-2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.mips.fpu">
+ <vector id="msa128" type="ieee_double" count="2"/>
+
+ <reg name="f0" bitsize="128" type="msa128"/>
+ <reg name="f1" bitsize="128" type="msa128"/>
+ <reg name="f2" bitsize="128" type="msa128"/>
+ <reg name="f3" bitsize="128" type="msa128"/>
+ <reg name="f4" bitsize="128" type="msa128"/>
+ <reg name="f5" bitsize="128" type="msa128"/>
+ <reg name="f6" bitsize="128" type="msa128"/>
+ <reg name="f7" bitsize="128" type="msa128"/>
+ <reg name="f8" bitsize="128" type="msa128"/>
+ <reg name="f9" bitsize="128" type="msa128"/>
+ <reg name="f10" bitsize="128" type="msa128"/>
+ <reg name="f11" bitsize="128" type="msa128"/>
+ <reg name="f12" bitsize="128" type="msa128"/>
+ <reg name="f13" bitsize="128" type="msa128"/>
+ <reg name="f14" bitsize="128" type="msa128"/>
+ <reg name="f15" bitsize="128" type="msa128"/>
+ <reg name="f16" bitsize="128" type="msa128"/>
+ <reg name="f17" bitsize="128" type="msa128"/>
+ <reg name="f18" bitsize="128" type="msa128"/>
+ <reg name="f19" bitsize="128" type="msa128"/>
+ <reg name="f20" bitsize="128" type="msa128"/>
+ <reg name="f21" bitsize="128" type="msa128"/>
+ <reg name="f22" bitsize="128" type="msa128"/>
+ <reg name="f23" bitsize="128" type="msa128"/>
+ <reg name="f24" bitsize="128" type="msa128"/>
+ <reg name="f25" bitsize="128" type="msa128"/>
+ <reg name="f26" bitsize="128" type="msa128"/>
+ <reg name="f27" bitsize="128" type="msa128"/>
+ <reg name="f28" bitsize="128" type="msa128"/>
+ <reg name="f29" bitsize="128" type="msa128"/>
+ <reg name="f30" bitsize="128" type="msa128"/>
+ <reg name="f31" bitsize="128" type="msa128"/>
+
+ <reg name="fcsr" bitsize="64" group="float"/>
+ <reg name="fir" bitsize="64" group="float"/>
+</feature>
new file mode 100644
@@ -0,0 +1,108 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: mips64-msa-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_mips64_msa_linux;
+static void
+initialize_tdesc_mips64_msa_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("mips"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cpu");
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "lo", 33, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "hi", 34, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "pc", 37, 1, NULL, 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.cp0");
+ tdesc_create_reg (feature, "status", 32, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "badvaddr", 35, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "cause", 36, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "config5", 38, 1, NULL, 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.fpu");
+ field_type = tdesc_named_type (feature, "ieee_double");
+ tdesc_create_vector (feature, "msa128", field_type, 2);
+
+ tdesc_create_reg (feature, "f0", 39, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f1", 40, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f2", 41, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f3", 42, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f4", 43, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f5", 44, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f6", 45, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f7", 46, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f8", 47, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f9", 48, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f10", 49, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f11", 50, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f12", 51, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f13", 52, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f14", 53, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f15", 54, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f16", 55, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f17", 56, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f18", 57, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f19", 58, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f20", 59, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f21", 60, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f22", 61, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f23", 62, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f24", 63, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f25", 64, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f26", 65, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f27", 66, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f28", 67, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f29", 68, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f30", 69, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "f31", 70, 1, NULL, 128, "msa128");
+ tdesc_create_reg (feature, "fcsr", 71, 1, "float", 64, "int");
+ tdesc_create_reg (feature, "fir", 72, 1, "float", 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.msa");
+ tdesc_create_reg (feature, "msacsr", 73, 1, "vector", 64, "int");
+ tdesc_create_reg (feature, "msair", 74, 1, "vector", 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.mips.linux");
+ tdesc_create_reg (feature, "restart", 75, 1, "system", 64, "int");
+
+ tdesc_mips64_msa_linux = result;
+}
new file mode 100644
@@ -0,0 +1,24 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2007-2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>mips</architecture>
+ <xi:include href="mips64-cpu.xml"/>
+ <feature name="org.gnu.gdb.mips.cp0">
+ <reg name="status" bitsize="64" regnum="32"/>
+ <reg name="badvaddr" bitsize="64" regnum="35"/>
+ <reg name="cause" bitsize="64" regnum="36"/>
+ <reg name="config5" bitsize="64" regnum="38"/>
+ </feature>
+ <xi:include href="mips64-fpu128.xml"/>
+ <xi:include href="mips64-msa.xml"/>
+
+ <feature name="org.gnu.gdb.mips.linux">
+ <reg name="restart" bitsize="64" group="system"/>
+ </feature>
+</target>
new file mode 100644
@@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010-2013 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.mips.msa">
+ <reg name="msacsr" bitsize="64" group="vector"/>
+ <reg name="msair" bitsize="64" group="vector"/>
+</feature>
@@ -358,8 +358,8 @@ clean:
rm -f arm-with-iwmmxt.c
rm -f arm-with-vfpv2.c arm-with-vfpv3.c arm-with-neon.c
rm -f mips-linux.c mips-dsp-linux.c mips-fpu64-linux.c
- rm -f mips-fpu64-dsp-linux.c
- rm -f mips64-linux.c mips64-dsp-linux.c
+ rm -f mips-fpu64-dsp-linux.c mips-msa-linux.c
+ rm -f mips64-linux.c mips64-dsp-linux.c mips64-msa-linux.c
rm -f nios2-linux.c
rm -f powerpc-32.c powerpc-32l.c powerpc-64l.c powerpc-e500l.c
rm -f powerpc-altivec32l.c powerpc-cell32l.c powerpc-vsx32l.c
@@ -715,10 +715,14 @@ mips-fpu64-linux.c : $(srcdir)/../regformats/mips-fpu64-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-fpu64-linux.dat mips-fpu64-linux.c
mips-fpu64-dsp-linux.c : $(srcdir)/../regformats/mips-fpu64-dsp-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-fpu64-dsp-linux.dat mips-fpu64-dsp-linux.c
+mips-msa-linux.c : $(srcdir)/../regformats/mips-msa-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-msa-linux.dat mips-msa-linux.c
mips64-linux.c : $(srcdir)/../regformats/mips64-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips64-linux.dat mips64-linux.c
mips64-dsp-linux.c : $(srcdir)/../regformats/mips64-dsp-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips64-dsp-linux.dat mips64-dsp-linux.c
+mips64-msa-linux.c : $(srcdir)/../regformats/mips64-msa-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips64-msa-linux.dat mips64-msa-linux.c
nios2-linux.c : $(srcdir)/../regformats/nios2-linux.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/nios2-linux.dat nios2-linux.c
powerpc-32.c : $(srcdir)/../regformats/rs6000/powerpc-32.dat $(regdat_sh)
@@ -189,25 +189,33 @@ case "${target}" in
srv_regobj="${srv_regobj} mips-dsp-linux.o"
srv_regobj="${srv_regobj} mips-fpu64-linux.o"
srv_regobj="${srv_regobj} mips-fpu64-dsp-linux.o"
+ srv_regobj="${srv_regobj} mips-msa-linux.o"
srv_regobj="${srv_regobj} mips64-linux.o"
srv_regobj="${srv_regobj} mips64-dsp-linux.o"
+ srv_regobj="${srv_regobj} mips64-msa-linux.o"
srv_tgtobj="$srv_linux_obj linux-mips-low.o"
srv_tgtobj="${srv_tgtobj} mips-linux-watch.o"
srv_xmlfiles="mips-linux.xml"
srv_xmlfiles="${srv_xmlfiles} mips-dsp-linux.xml"
srv_xmlfiles="${srv_xmlfiles} mips-fpu64-linux.xml"
srv_xmlfiles="${srv_xmlfiles} mips-fpu64-dsp-linux.xml"
+ srv_xmlfiles="${srv_xmlfiles} mips-msa-linux.xml"
srv_xmlfiles="${srv_xmlfiles} mips-cpu.xml"
srv_xmlfiles="${srv_xmlfiles} mips-cp0.xml"
srv_xmlfiles="${srv_xmlfiles} mips-fpu.xml"
srv_xmlfiles="${srv_xmlfiles} mips-fpu64.xml"
srv_xmlfiles="${srv_xmlfiles} mips-dsp.xml"
+ srv_xmlfiles="${srv_xmlfiles} mips-fpu128.xml"
+ srv_xmlfiles="${srv_xmlfiles} mips-msa.xml"
srv_xmlfiles="${srv_xmlfiles} mips64-linux.xml"
srv_xmlfiles="${srv_xmlfiles} mips64-dsp-linux.xml"
+ srv_xmlfiles="${srv_xmlfiles} mips64-msa-linux.xml"
srv_xmlfiles="${srv_xmlfiles} mips64-cpu.xml"
srv_xmlfiles="${srv_xmlfiles} mips64-cp0.xml"
srv_xmlfiles="${srv_xmlfiles} mips64-fpu.xml"
srv_xmlfiles="${srv_xmlfiles} mips64-dsp.xml"
+ srv_xmlfiles="${srv_xmlfiles} mips64-fpu128.xml"
+ srv_xmlfiles="${srv_xmlfiles} mips64-msa.xml"
srv_linux_regsets=yes
srv_linux_usrregs=yes
srv_linux_thread_db=yes
new file mode 100644
@@ -0,0 +1,80 @@
+# DO NOT EDIT: generated from mips-msa-linux.xml
+name:mips_msa_linux
+xmltarget:mips-msa-linux.xml
+expedite:r29,pc
+32:r0
+32:r1
+32:r2
+32:r3
+32:r4
+32:r5
+32:r6
+32:r7
+32:r8
+32:r9
+32:r10
+32:r11
+32:r12
+32:r13
+32:r14
+32:r15
+32:r16
+32:r17
+32:r18
+32:r19
+32:r20
+32:r21
+32:r22
+32:r23
+32:r24
+32:r25
+32:r26
+32:r27
+32:r28
+32:r29
+32:r30
+32:r31
+32:status
+32:lo
+32:hi
+32:badvaddr
+32:cause
+32:pc
+32:config5
+128:f0
+128:f1
+128:f2
+128:f3
+128:f4
+128:f5
+128:f6
+128:f7
+128:f8
+128:f9
+128:f10
+128:f11
+128:f12
+128:f13
+128:f14
+128:f15
+128:f16
+128:f17
+128:f18
+128:f19
+128:f20
+128:f21
+128:f22
+128:f23
+128:f24
+128:f25
+128:f26
+128:f27
+128:f28
+128:f29
+128:f30
+128:f31
+32:fcsr
+32:fir
+32:msacsr
+32:msair
+32:restart
new file mode 100644
@@ -0,0 +1,80 @@
+# DO NOT EDIT: generated from mips64-msa-linux.xml
+name:mips64_msa_linux
+xmltarget:mips64-msa-linux.xml
+expedite:r29,pc
+64:r0
+64:r1
+64:r2
+64:r3
+64:r4
+64:r5
+64:r6
+64:r7
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:r16
+64:r17
+64:r18
+64:r19
+64:r20
+64:r21
+64:r22
+64:r23
+64:r24
+64:r25
+64:r26
+64:r27
+64:r28
+64:r29
+64:r30
+64:r31
+64:status
+64:lo
+64:hi
+64:badvaddr
+64:cause
+64:pc
+64:config5
+128:f0
+128:f1
+128:f2
+128:f3
+128:f4
+128:f5
+128:f6
+128:f7
+128:f8
+128:f9
+128:f10
+128:f11
+128:f12
+128:f13
+128:f14
+128:f15
+128:f16
+128:f17
+128:f18
+128:f19
+128:f20
+128:f21
+128:f22
+128:f23
+128:f24
+128:f25
+128:f26
+128:f27
+128:f28
+128:f29
+128:f30
+128:f31
+64:fcsr
+64:fir
+64:msacsr
+64:msair
+64:restart