From patchwork Mon Mar 21 10:39:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 11421 Received: (qmail 36923 invoked by alias); 21 Mar 2016 10:40:19 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 36140 invoked by uid 89); 21 Mar 2016 10:40:18 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=Packing, 1, 5, bfc, median X-HELO: mail-pf0-f169.google.com Received: from mail-pf0-f169.google.com (HELO mail-pf0-f169.google.com) (209.85.192.169) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Mon, 21 Mar 2016 10:40:06 +0000 Received: by mail-pf0-f169.google.com with SMTP id n5so260235076pfn.2 for ; Mon, 21 Mar 2016 03:40:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id; bh=Sky+o/DsBDDurc8Ob8BvN2s+WYB3ctY9/AxytL/ZB9Y=; b=OOFpMASx2G5CuwKM7jWov6u+yT10osuNnSsUcsozYupF/DTy7G1tr92dFh9wuMzMET +xnm/9Fegm3HyXpamHqm/PenbKYnYe3aVmr1s/utqKQB9SeKx2Ic1lsPmgYMatkw6elN XV3eMPuvCP7JEVC9ILo/25tq3E1WgyuE9sF4K6UBRC7FxNRi0Wu2hQ9u1NVWDkTES6pI pRU6HyHSJpEC52hjGwYhe10FuLzS+oUmkUdKddGSH/x4m9lHDqUUbaEuuvzgRrLp+CBS PjQz5ZUsqQ5ZHUR+d9sxPDjfitenUYi8DFwQ0Z6UlW4h9ZAxJQbzA4MExYFhzkywD+Tp 30yw== X-Gm-Message-State: AD7BkJJMNHyC9myZ1/LQYF9NyQwLoEiLVl9gsMjo5fyvitFIn1pgBVEniYLpooB4naX3Eg== X-Received: by 10.66.140.14 with SMTP id rc14mr44189528pab.65.1458556804861; Mon, 21 Mar 2016 03:40:04 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (power-aix.osuosl.org. [140.211.15.154]) by smtp.gmail.com with ESMTPSA id ux2sm39648604pac.46.2016.03.21.03.40.03 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Mar 2016 03:40:04 -0700 (PDT) From: Yao Qi X-Google-Original-From: Yao Qi To: gdb-patches@sourceware.org Subject: [PATCH] ARM process record: median instructions Date: Mon, 21 Mar 2016 10:39:56 +0000 Message-Id: <1458556796-1903-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes This patch is to support some ARM median instructions in process record. With this patch applied, these fails are fixed: -FAIL: gdb.reverse/break-precsave.exp: run to end of main -FAIL: gdb.reverse/break-precsave.exp: go to end of main forward -FAIL: gdb.reverse/break-precsave.exp: end of record log -FAIL: gdb.reverse/break-reverse.exp: continue to breakpoint: end -FAIL: gdb.reverse/break-reverse.exp: end of record log -FAIL: gdb.reverse/until-precsave.exp: run to end of main -FAIL: gdb.reverse/until-precsave.exp: advance to marker2 -FAIL: gdb.reverse/until-precsave.exp: until func, not called by current frame -FAIL: gdb.reverse/until-precsave.exp: reverse-advance to marker2 -FAIL: gdb.reverse/until-precsave.exp: reverse-finish from marker2 -FAIL: gdb.reverse/until-precsave.exp: reverse-advance to final return of factorial -FAIL: gdb.reverse/until-precsave.exp: reverse-until to entry of factorial -FAIL: gdb.reverse/until-reverse.exp: advance to marker2 -FAIL: gdb.reverse/until-reverse.exp: until func, not called by current frame -FAIL: gdb.reverse/until-reverse.exp: reverse-advance to marker2 -FAIL: gdb.reverse/until-reverse.exp: reverse-finish from marker2 -FAIL: gdb.reverse/until-reverse.exp: reverse-advance to final return of factorial -FAIL: gdb.reverse/until-reverse.exp: reverse-until to entry of factorial gdb: 2016-03-21 Yao Qi * arm-tdep.c (arm_record_media): New. (arm_record_ld_st_reg_offset): Call arm_record_media. --- gdb/ChangeLog | 5 ++++ gdb/arm-tdep.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 90 insertions(+) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 551d070..cfb3716 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,10 @@ 2016-03-21 Yao Qi + * arm-tdep.c (arm_record_media): New. + (arm_record_ld_st_reg_offset): Call arm_record_media. + +2016-03-21 Yao Qi + * arm-linux-tdep.c (arm_canonicalize_syscall): Canonicalize more syscalls. diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 54a21ef..ad69834 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -10288,6 +10288,88 @@ arm_record_data_proc_imm (insn_decode_record *arm_insn_r) return 0; } +static int +arm_record_media (insn_decode_record *arm_insn_r) +{ + uint32_t record_buf[8]; + + switch (bits (arm_insn_r->arm_insn, 22, 24)) + { + case 0: + /* Parallel addition and subtraction, signed */ + case 1: + /* Parallel addition and subtraction, unsigned */ + case 2: + case 3: + /* Packing, unpacking, saturation and reversal */ + { + int rd = bits (arm_insn_r->arm_insn, 12, 15); + + record_buf[arm_insn_r->reg_rec_count++] = rd; + } + break; + + case 4: + case 5: + /* Signed multiplies */ + { + int rd = bits (arm_insn_r->arm_insn, 16, 19); + unsigned int op1 = bits (arm_insn_r->arm_insn, 20, 22); + + record_buf[arm_insn_r->reg_rec_count++] = rd; + if (op1 == 0x0) + record_buf[arm_insn_r->reg_rec_count++] = ARM_PS_REGNUM; + else if (op1 == 0x4) + record_buf[arm_insn_r->reg_rec_count++] + = bits (arm_insn_r->arm_insn, 12, 15); + } + break; + + case 6: + { + if (bit (arm_insn_r->arm_insn, 21) + && bits (arm_insn_r->arm_insn, 5, 6) == 0x2) + { + /* SBFX */ + record_buf[arm_insn_r->reg_rec_count++] + = bits (arm_insn_r->arm_insn, 12, 15); + } + else if (bits (arm_insn_r->arm_insn, 20, 21) == 0x0 + && bits (arm_insn_r->arm_insn, 5, 7) == 0x0) + { + /* USAD8 and USADA8 */ + record_buf[arm_insn_r->reg_rec_count++] + = bits (arm_insn_r->arm_insn, 16, 19); + } + } + break; + + case 7: + { + if (bits (arm_insn_r->arm_insn, 20, 21) == 0x3 + && bits (arm_insn_r->arm_insn, 5, 7) == 0x7) + { + /* Permanently UNDEFINED */ + return -1; + } + else + { + /* BFC, BFI and UBFX */ + record_buf[arm_insn_r->reg_rec_count++] + = bits (arm_insn_r->arm_insn, 12, 15); + } + } + break; + + default: + return -1; + } + + REG_ALLOC (arm_insn_r->arm_regs, arm_insn_r->reg_rec_count, record_buf); + + return 0; +} + /* Handle ARM mode instructions with opcode 010. */ static int @@ -10394,6 +10476,9 @@ arm_record_ld_st_reg_offset (insn_decode_record *arm_insn_r) LONGEST s_word; ULONGEST u_regval[2]; + if (bit (arm_insn_r->arm_insn, 4)) + return arm_record_media (arm_insn_r); + arm_insn_r->opcode = bits (arm_insn_r->arm_insn, 21, 24); arm_insn_r->decode = bits (arm_insn_r->arm_insn, 4, 7);