Message ID | 1456414378-1918-1-git-send-email-antoine.tremblay@ericsson.com |
---|---|
State | New |
Headers | show |
On 02/25/2016 03:32 PM, Antoine Tremblay wrote: > In this v6: > * use https://sourceware.org/ml/gdb-patches/2016-02/msg00786.html to map > registers to remote registers. (This is already in master) > * Fix test changelog > * Test is already renamed, update patch. > - > This patch implements the ax_pseudo_register_push_stack and > ax_pseudo_register_collect gdbarch functions so that a pseudo-register can > be traced. > FAOD, I'm happy with this version, if Yao is happy. > dummy (void) > @@ -37,6 +41,7 @@ main (void) > { > /* Strictly speaking, it should be ymm15 (xmm15 is 128-bit), but gcc older > than 4.9 doesn't recognize "ymm15" as a valid register name. */ > +#if (defined __x86_64__) The comment should be within the #if. Thanks, Pedro Alves
Pedro Alves writes: > On 02/25/2016 03:32 PM, Antoine Tremblay wrote: >> In this v6: >> * use https://sourceware.org/ml/gdb-patches/2016-02/msg00786.html to map >> registers to remote registers. (This is already in master) >> * Fix test changelog >> * Test is already renamed, update patch. >> - >> This patch implements the ax_pseudo_register_push_stack and >> ax_pseudo_register_collect gdbarch functions so that a pseudo-register can >> be traced. >> > > FAOD, I'm happy with this version, if Yao is happy. > OK. I'll wait for Yao's review. >> dummy (void) >> @@ -37,6 +41,7 @@ main (void) >> { >> /* Strictly speaking, it should be ymm15 (xmm15 is 128-bit), but gcc older >> than 4.9 doesn't recognize "ymm15" as a valid register name. */ >> +#if (defined __x86_64__) > > The comment should be within the #if. > Fixed, thanks. Antoine
Antoine Tremblay <antoine.tremblay@ericsson.com> writes: > @@ -20,7 +20,11 @@ > * registers on x86_64. > */ > The comments above should be updated as well. > +#if (defined __x86_64__) > #include <immintrin.h> > +#elif (defined __arm__ || defined __thumb2__ || defined __thumb__) __arm__ is defined even in thumb mode, so only "defined __arm__" is enough. > +#include <arm_neon.h> Why do you include arm_neon.h? I don't see anything NEON specific is used. > +#endif > > void > dummy (void) > @@ -37,6 +41,7 @@ main (void) > { > /* Strictly speaking, it should be ymm15 (xmm15 is 128-bit), but gcc older > than 4.9 doesn't recognize "ymm15" as a valid register name. */ > +#if (defined __x86_64__) > register __v8si a asm("xmm15") = { > 0x12340001, > 0x12340002, > @@ -48,6 +53,13 @@ main (void) > 0x12340008, > }; > asm volatile ("traceme: call dummy" : : "x" (a)); > +#elif (defined __arm__ || defined __thumb2__ || defined __thumb__) Only "defined __arm__" is needed. > + register uint32_t a asm("s5") = { > + 0x2 > + }; I'd like to write an inline asm to set s5 a value and the value can be shown as an integer so that the test is more reliable (current test tests float "2.80259693e-45"). > + asm volatile ("traceme: bl dummy" : : "x" (a)); > +#endif > + > end (); > return 0; > } > diff --git a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp > index 4c52c64..12a2740 100644 > --- a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp > +++ b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp > @@ -12,8 +12,8 @@ > # You should have received a copy of the GNU General Public License > # along with this program. If not, see <http://www.gnu.org/licenses/>. > > -if { ! [is_amd64_regs_target] } { > - verbose "Skipping tfile AVX test (target is not x86_64)." > +if { ! [is_amd64_regs_target] && ! [istarget "arm*-*-*"] } { > + verbose "Skipping tracefile pseudo register tests, target is not supported." > return > } > > @@ -21,8 +21,14 @@ load_lib "trace-support.exp" > > standard_testfile > > +if { [is_amd64_regs_target] } { > + set add_flags "-mavx" > +} elseif { [istarget "arm*-*-*"] } { > + set add_flags "-mfpu=neon" Don't have to pass -mfpu=neon, because the case is also valid for vfp. > +} > + > if {[prepare_for_testing $testfile.exp $testfile $srcfile \ > - [list debug additional_flags=-mavx]]} { > + [list debug additional_flags=$add_flags]]} { > return -1 > } > > @@ -36,20 +42,31 @@ if ![gdb_target_supports_trace] { > return -1 > } > > -gdb_test_multiple "print \$ymm15" "check for AVX support" { > +if { [is_amd64_regs_target] } { > + set reg "\$ymm15" > + set reg_message "check for AVX support" > +} elseif { [istarget "arm*-*-*"] } { > + set reg "\$s5" > + set reg_message "check for Neon support" $s5 exists on the processors which support NEON or VFP, so the $reg_message isn't accurate. We can change reg_message to "check register $reg".
Yao Qi writes: > Antoine Tremblay <antoine.tremblay@ericsson.com> writes: > >> @@ -20,7 +20,11 @@ >> * registers on x86_64. >> */ >> > > The comments above should be updated as well. Done. > >> +#if (defined __x86_64__) >> #include <immintrin.h> >> +#elif (defined __arm__ || defined __thumb2__ || defined __thumb__) > > __arm__ is defined even in thumb mode, so only "defined __arm__" is enough. > >> +#include <arm_neon.h> > > Why do you include arm_neon.h? I don't see anything NEON specific is used. > >> +#endif Indeed I was playing with neon types before, forgot to remove it. Fixed. >> >> void >> dummy (void) >> @@ -37,6 +41,7 @@ main (void) >> { >> /* Strictly speaking, it should be ymm15 (xmm15 is 128-bit), but gcc older >> than 4.9 doesn't recognize "ymm15" as a valid register name. */ >> +#if (defined __x86_64__) >> register __v8si a asm("xmm15") = { >> 0x12340001, >> 0x12340002, >> @@ -48,6 +53,13 @@ main (void) >> 0x12340008, >> }; >> asm volatile ("traceme: call dummy" : : "x" (a)); >> +#elif (defined __arm__ || defined __thumb2__ || defined __thumb__) > > Only "defined __arm__" is needed. > Done. >> + register uint32_t a asm("s5") = { >> + 0x2 >> + }; > > I'd like to write an inline asm to set s5 a value and the value can be shown as > an integer so that the test is more reliable (current test tests float > "2.80259693e-45"). > Done. >> + asm volatile ("traceme: bl dummy" : : "x" (a)); >> +#endif >> + >> end (); >> return 0; >> } >> diff --git a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp >> index 4c52c64..12a2740 100644 >> --- a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp >> +++ b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp >> @@ -12,8 +12,8 @@ >> # You should have received a copy of the GNU General Public License >> # along with this program. If not, see <http://www.gnu.org/licenses/>. >> >> -if { ! [is_amd64_regs_target] } { >> - verbose "Skipping tfile AVX test (target is not x86_64)." >> +if { ! [is_amd64_regs_target] && ! [istarget "arm*-*-*"] } { >> + verbose "Skipping tracefile pseudo register tests, target is not supported." >> return >> } >> >> @@ -21,8 +21,14 @@ load_lib "trace-support.exp" >> >> standard_testfile >> >> +if { [is_amd64_regs_target] } { >> + set add_flags "-mavx" >> +} elseif { [istarget "arm*-*-*"] } { >> + set add_flags "-mfpu=neon" > > Don't have to pass -mfpu=neon, because the case is also valid for vfp. > Right, Fixed. >> +} >> + >> if {[prepare_for_testing $testfile.exp $testfile $srcfile \ >> - [list debug additional_flags=-mavx]]} { >> + [list debug additional_flags=$add_flags]]} { >> return -1 >> } >> >> @@ -36,20 +42,31 @@ if ![gdb_target_supports_trace] { >> return -1 >> } >> >> -gdb_test_multiple "print \$ymm15" "check for AVX support" { >> +if { [is_amd64_regs_target] } { >> + set reg "\$ymm15" >> + set reg_message "check for AVX support" >> +} elseif { [istarget "arm*-*-*"] } { >> + set reg "\$s5" >> + set reg_message "check for Neon support" > > $s5 exists on the processors which support NEON or VFP, so the > $reg_message isn't accurate. We can change reg_message to "check > register $reg". Done. A v7 patch follows.
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 2151ffa..6d50e9e 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -8716,6 +8716,70 @@ arm_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache, } } +/* Map the pseudo register number REG to the proper register number. */ + +static int +arm_pseudo_register_to_register (struct gdbarch *gdbarch, int reg) +{ + int double_regnum = 0; + int num_regs = gdbarch_num_regs (gdbarch); + char name_buf[4]; + + /* Single precision pseudo registers. s0-s31. */ + if (reg >= num_regs && reg < num_regs + 32) + { + xsnprintf (name_buf, sizeof (name_buf), "d%d", (reg - num_regs) / 2); + double_regnum = user_reg_map_name_to_regnum (gdbarch, name_buf, + strlen (name_buf)); + } + /* Quadruple precision pseudo regisers. q0-q15. */ + else if (reg >= num_regs + 32 && reg < num_regs + 32 + 16) + { + xsnprintf (name_buf, sizeof (name_buf), "d%d", (reg - num_regs - 32) * 2); + double_regnum = user_reg_map_name_to_regnum (gdbarch, name_buf, + strlen (name_buf)); + } + /* Error bad register number. */ + else + return -1; + + return double_regnum; +} + +/* Implementation of the ax_pseudo_register_collect gdbarch function. */ + +static int +arm_ax_pseudo_register_collect (struct gdbarch *gdbarch, + struct agent_expr *ax, int reg) +{ + int rawnum = arm_pseudo_register_to_register (gdbarch, reg); + + /* Error. */ + if (rawnum < 0) + return 1; + + ax_reg_mask (ax, rawnum); + + return 0; +} + +/* Implementation of the ax_pseudo_register_push_stack gdbarch function. */ + +static int +arm_ax_pseudo_register_push_stack (struct gdbarch *gdbarch, + struct agent_expr *ax, int reg) +{ + int rawnum = arm_pseudo_register_to_register (gdbarch, reg); + + /* Error. */ + if (rawnum < 0) + return 1; + + ax_reg (ax, rawnum); + + return 0; +} + static struct value * value_of_arm_user_reg (struct frame_info *frame, const void *baton) { @@ -9377,6 +9441,10 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_num_pseudo_regs (gdbarch, num_pseudos); set_gdbarch_pseudo_register_read (gdbarch, arm_pseudo_read); set_gdbarch_pseudo_register_write (gdbarch, arm_pseudo_write); + set_gdbarch_ax_pseudo_register_push_stack + (gdbarch, arm_ax_pseudo_register_push_stack); + set_gdbarch_ax_pseudo_register_collect + (gdbarch, arm_ax_pseudo_register_collect); } if (tdesc_data) diff --git a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.c b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.c index 3cc3ec0..473d805 100644 --- a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.c +++ b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.c @@ -20,7 +20,11 @@ * registers on x86_64. */ +#if (defined __x86_64__) #include <immintrin.h> +#elif (defined __arm__ || defined __thumb2__ || defined __thumb__) +#include <arm_neon.h> +#endif void dummy (void) @@ -37,6 +41,7 @@ main (void) { /* Strictly speaking, it should be ymm15 (xmm15 is 128-bit), but gcc older than 4.9 doesn't recognize "ymm15" as a valid register name. */ +#if (defined __x86_64__) register __v8si a asm("xmm15") = { 0x12340001, 0x12340002, @@ -48,6 +53,13 @@ main (void) 0x12340008, }; asm volatile ("traceme: call dummy" : : "x" (a)); +#elif (defined __arm__ || defined __thumb2__ || defined __thumb__) + register uint32_t a asm("s5") = { + 0x2 + }; + asm volatile ("traceme: bl dummy" : : "x" (a)); +#endif + end (); return 0; } diff --git a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp index 4c52c64..12a2740 100644 --- a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp +++ b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp @@ -12,8 +12,8 @@ # You should have received a copy of the GNU General Public License # along with this program. If not, see <http://www.gnu.org/licenses/>. -if { ! [is_amd64_regs_target] } { - verbose "Skipping tfile AVX test (target is not x86_64)." +if { ! [is_amd64_regs_target] && ! [istarget "arm*-*-*"] } { + verbose "Skipping tracefile pseudo register tests, target is not supported." return } @@ -21,8 +21,14 @@ load_lib "trace-support.exp" standard_testfile +if { [is_amd64_regs_target] } { + set add_flags "-mavx" +} elseif { [istarget "arm*-*-*"] } { + set add_flags "-mfpu=neon" +} + if {[prepare_for_testing $testfile.exp $testfile $srcfile \ - [list debug additional_flags=-mavx]]} { + [list debug additional_flags=$add_flags]]} { return -1 } @@ -36,20 +42,31 @@ if ![gdb_target_supports_trace] { return -1 } -gdb_test_multiple "print \$ymm15" "check for AVX support" { +if { [is_amd64_regs_target] } { + set reg "\$ymm15" + set reg_message "check for AVX support" +} elseif { [istarget "arm*-*-*"] } { + set reg "\$s5" + set reg_message "check for Neon support" +} + +gdb_test_multiple "print $reg" $reg_message { -re " = void.*$gdb_prompt $" { - verbose "Skipping tfile AVX test (target doesn't support AVX)." + verbose "Skipping tracefile pseudo register tests, target is not supported." return } -re " = \\{.*}.*$gdb_prompt $" { # All is well. } + -re " = 0.*$gdb_prompt $" { + # All is well. + } } gdb_test "trace traceme" ".*" gdb_trace_setactions "set actions for tracepoint" "" \ - "collect \$ymm15" "^$" + "collect $reg" "^$" gdb_breakpoint "end" @@ -70,4 +87,8 @@ gdb_test "target tfile ${tracefile}.tf" "" "change to tfile target" \ gdb_test "tfind 0" "Found trace frame 0, tracepoint .*" -gdb_test "print/x \$ymm15.v8_int32" " = \\{0x12340001, .*, 0x12340008}" +if { [is_amd64_regs_target] } { + gdb_test "print/x \$ymm15.v8_int32" " = \\{0x12340001, .*, 0x12340008}" +} elseif { [istarget "arm*-*-*"] } { + gdb_test "print \$s5" "2.80259693e-45" +}